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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-12-08 16:41:18 -0600 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-01-16 05:35:28 +0100 |
| commit | 07d881a02dce014a3218fa3824390f7683c3031f (patch) | |
| tree | 19e72b1b1ca98b95a661dab315b064172d17c7ef /src/cpu/intel/model_f1x | |
| parent | 2c38f50b4ad8850676a70427bf1e2e9e9aab82a4 (diff) | |
| download | coreboot-07d881a02dce014a3218fa3824390f7683c3031f.tar.xz | |
cpu/intel: Remove dummy terminators from microcode blobs
Now that CBFS microcode no longer requires a NULL termination, remove the
dummy terminators from all microcode blobs. This also enables microcode
blobs from different CPU models to be linked in the same
cpu_microcode_blob.bin without the terminators getting in the way.
Change-Id: I25a6454780fd5d56ae7660b0733ac4f8c4d90096
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4506
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/intel/model_f1x')
| -rw-r--r-- | src/cpu/intel/model_f1x/microcode_blob.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/cpu/intel/model_f1x/microcode_blob.c b/src/cpu/intel/model_f1x/microcode_blob.c index 308402c5e1..6adcc41452 100644 --- a/src/cpu/intel/model_f1x/microcode_blob.c +++ b/src/cpu/intel/model_f1x/microcode_blob.c @@ -1,17 +1,7 @@ /* 256KB cache */ unsigned microcode_updates_f1x[] = { - /* WARNING - Intel has a new data structure that has variable length - * microcode update lengths. They are encoded in int 8 and 9. A - * dummy header of nulls must terminate the list. - */ #include "microcode-1068-m01f122d.h" #include "microcode-1069-m04f122e.h" #include "microcode-1070-m02f122f.h" #include "microcode-1072-m04f1305.h" - - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, }; |