diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-07 23:52:18 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-08 13:52:43 +0200 |
| commit | f7c55148c02dcfd39f585aa90513a18d66815a97 (patch) | |
| tree | 271909122370538dc29314ffe8c112e040865879 /src/cpu/intel/slot_1 | |
| parent | 7e8d48372b8638fcba78c99b8ce0128bec4eaafc (diff) | |
| download | coreboot-f7c55148c02dcfd39f585aa90513a18d66815a97.tar.xz | |
cpu: Trivial - drop trailing blank lines at EOF
Change-Id: I9004f34ba0c13b4489b26ac8c1476d00a6c6d01d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6207
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/intel/slot_1')
| -rw-r--r-- | src/cpu/intel/slot_1/l2_cache.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c index a974d24c3d..fc351aba18 100644 --- a/src/cpu/intel/slot_1/l2_cache.c +++ b/src/cpu/intel/slot_1/l2_cache.c @@ -807,4 +807,3 @@ out: printk(BIOS_INFO, "done.\n"); return result; } - |