- Bump the LinuxBIOS major version

- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 2 insertions, 2 deletions

diff --git a/src/cpu/intel/slot_2/chip.h b/src/cpu/intel/slot_2/chip.h
index 04a128d894..6143302144 100644
--- a/src/cpu/intel/slot_2/chip.h
+++ b/src/cpu/intel/slot_2/chip.h
@@ -1,4 +1,4 @@
-extern struct chip_control cpu_intel_slot_2_control;
+extern struct chip_operations cpu_intel_slot_2_control;
 
 struct cpu_intel_slot_2_config {
 };
diff --git a/src/cpu/intel/slot_2/slot_2.c b/src/cpu/intel/slot_2/slot_2.c
index 2d4fb9373c..5752f3dbb9 100644
--- a/src/cpu/intel/slot_2/slot_2.c
+++ b/src/cpu/intel/slot_2/slot_2.c
@@ -2,6 +2,6 @@
 #include "chip.h"
 
 
-struct chip_control cpu_intel_slot_2_control = {
+struct chip_operations cpu_intel_slot_2_control = {
 	.name = "slot 2",
 };