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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-09-30 20:23:09 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-15 03:52:49 +0000
commit86091f94b6ca58f4b8795503b274492d6a935c15 (patch)
treedb6e5f77dc57850b25574aed5063743ca4bc4d48 /src/cpu/intel/smm
parent58562405c8c416a415652516b8af31b204b4ff0d (diff)
downloadcoreboot-86091f94b6ca58f4b8795503b274492d6a935c15.tar.xz
cpu/mtrr.h: Fix macro names for MTRR registers
We use UNDERSCORE_CASE. For the MTRR macros that refer to an MSR, we also remove the _MSR suffix, as they are, by definition, MSRs. Change-Id: Id4483a75d62cf1b478a9105ee98a8f55140ce0ef Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11761 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/intel/smm')
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index bc14444dbf..41ec39cab0 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -63,8 +63,8 @@ static inline void write_smrr(struct smm_relocation_params *relo_params)
{
printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
relo_params->smrr_base.lo, relo_params->smrr_mask.lo);
- wrmsr(SMRRphysBase_MSR, relo_params->smrr_base);
- wrmsr(SMRRphysMask_MSR, relo_params->smrr_mask);
+ wrmsr(SMRR_PHYS_BASE, relo_params->smrr_base);
+ wrmsr(SMRR_PHYS_MASK, relo_params->smrr_mask);
}
/* The relocation work is actually performed in SMM context, but the code
@@ -109,7 +109,7 @@ static void asmlinkage cpu_smm_do_relocation(void *arg)
save_state->smbase, save_state->iedbase, save_state);
/* Write SMRR MSRs based on indicated support. */
- mtrr_cap = rdmsr(MTRRcap_MSR);
+ mtrr_cap = rdmsr(MTRR_CAP_MSR);
if (mtrr_cap.lo & SMRR_SUPPORTED)
write_smrr(relo_params);
@@ -142,7 +142,7 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
/* SMRR has 32-bits of valid address aligned to 4KiB. */
params->smrr_base.lo = (params->smram_base & rmask) | MTRR_TYPE_WRBACK;
params->smrr_base.hi = 0;
- params->smrr_mask.lo = (~(tseg_size - 1) & rmask) | MTRRphysMaskValid;
+ params->smrr_mask.lo = (~(tseg_size - 1) & rmask) | MTRR_PHYS_MASK_VALID;
params->smrr_mask.hi = 0;
}