diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-17 20:51:50 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-18 20:00:16 +0200 |
commit | 831a7ef541055ffeebc3103e82670e0d170b098d (patch) | |
tree | aaca4d75ad7c82aba26159566ce1f7ac57de1541 /src/cpu/intel/socket_LGA775/Makefile.inc | |
parent | 9d2762ca6f2c0414afdca210ba996db7a0956690 (diff) | |
download | coreboot-831a7ef541055ffeebc3103e82670e0d170b098d.tar.xz |
intel/cache_as_ram_ht.inc: Fix include
Reference to CACHE_AS_RAM was from the days we had
romcc boards using socket_mPGA605.
Change-Id: If397db83a01adeda4dd18d8b4c6e89bf0984264a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15224
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/intel/socket_LGA775/Makefile.inc')
-rw-r--r-- | src/cpu/intel/socket_LGA775/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index 889b19bd27..af57eda762 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,4 +14,4 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading subdirs-y += ../speedstep -cpu_incs-$(CONFIG_CACHE_AS_RAM) += $(src)/cpu/intel/car/cache_as_ram_ht.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc |