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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-22 23:06:33 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-25 09:17:14 +0000 |
| commit | 689256797e0dc157046888f83bf64ae410df7f14 (patch) | |
| tree | 8aa6390810a256a515c4260987fc008987c19303 /src/cpu/intel/socket_LGA775 | |
| parent | 878b68581405fc221b6da37b898c28f63f62c359 (diff) | |
| download | coreboot-689256797e0dc157046888f83bf64ae410df7f14.tar.xz | |
Drop superfluous C_ENVIRONMENT_BOOTBLOCK checks
Some guarding is not needed because the linker drops the code,
other guarding is not needed because all platforms using the code now
have C_ENVIRONMENT_BOOTBLOCK.
Change-Id: I3b1a94e709aa291e1156c854874d7bf461981f32
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/intel/socket_LGA775')
| -rw-r--r-- | src/cpu/intel/socket_LGA775/Makefile.inc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index a7984a9dfb..2f1c6b49ea 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -13,13 +13,9 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading subdirs-y += ../speedstep -ifneq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y) -cpu_incs-y += $(src)/cpu/intel/car/p4-netburst/cache_as_ram.S -else bootblock-y += ../car/p4-netburst/cache_as_ram.S bootblock-y += ../car/bootblock.c bootblock-y += ../../x86/early_reset.S -endif postcar-y += ../car/p4-netburst/exit_car.S |