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| author | Stefan Reinauer <reinauer@chromium.org> | 2015-04-17 23:02:22 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-05-04 22:18:23 +0200 |
| commit | 2436bda11dbb5839325708e306fd0872a0f90674 (patch) | |
| tree | 1ac8b806fc1dea151bda6e9b6322f093b03665be /src/cpu/intel/socket_mFCBGA479/Makefile.inc | |
| parent | 99cc1aacc68e6458e2465842c3afe4d684970d1b (diff) | |
| download | coreboot-2436bda11dbb5839325708e306fd0872a0f90674.tar.xz | |
cpu: get rid of socket source code
None of the sockets has actual configuration options, so the source
for them is only cosmetical boilerplate. Hence, drop it. This reduces
the sockets to be selectors for certain CPU types, which will be dropped
in future commits, and mainboards will select their CPUs directly rather
than through an additional layer of indirection (sockets)
Change-Id: I0f52a65838875a73531ef8c92a171bb1a35be96e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9797
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Diffstat (limited to 'src/cpu/intel/socket_mFCBGA479/Makefile.inc')
| -rw-r--r-- | src/cpu/intel/socket_mFCBGA479/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_mFCBGA479/Makefile.inc b/src/cpu/intel/socket_mFCBGA479/Makefile.inc index e8d6f29f5c..9e1444dcd2 100644 --- a/src/cpu/intel/socket_mFCBGA479/Makefile.inc +++ b/src/cpu/intel/socket_mFCBGA479/Makefile.inc @@ -1,4 +1,3 @@ -ramstage-y += socket_mFCBGA479.c subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr |