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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-27 13:24:11 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-08 19:46:25 +0100
commit8160a2f63db5a04a846b434701a88b449cc6f05f (patch)
tree280f60e27488db9189b973be05abafc62e108496 /src/cpu/intel/socket_mFCBGA479/Makefile.inc
parent19652e6f408851826386d52458ae21e617af8276 (diff)
downloadcoreboot-8160a2f63db5a04a846b434701a88b449cc6f05f.tar.xz
intel post-car: Split legacy sockets
Move old sockets to use romstage_legacy.c, these are ones using intel/car/cache_as_ram.inc. These will not be converted to RELOCATABLE_RAMSTAGE as boards are candidates for getting dropped from the tree anyways. Change-Id: I2616b4edee53446f1875711291e9dfed2911e2fb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17280 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/socket_mFCBGA479/Makefile.inc')
-rw-r--r--src/cpu/intel/socket_mFCBGA479/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_mFCBGA479/Makefile.inc b/src/cpu/intel/socket_mFCBGA479/Makefile.inc
index c84659807a..918a54e800 100644
--- a/src/cpu/intel/socket_mFCBGA479/Makefile.inc
+++ b/src/cpu/intel/socket_mFCBGA479/Makefile.inc
@@ -7,4 +7,4 @@ subdirs-y += ../../x86/smm
subdirs-y += ../microcode
cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
-romstage-y += ../car/romstage.c
+romstage-y += ../car/romstage_legacy.c