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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-04-06 04:03:50 +0300 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-06 04:57:04 +0200 |
| commit | f8c7c2396eb843b17fd32d19bd9e481e088cee57 (patch) | |
| tree | 4b1bd330bd546102a10b27f951742b5821f61d45 /src/cpu/intel/socket_mPGA604 | |
| parent | 334532eeffac3a26ffbd25bdf4808b87cad2a208 (diff) | |
| download | coreboot-f8c7c2396eb843b17fd32d19bd9e481e088cee57.tar.xz | |
Fix support for RAM-less multi-processor init
Fix regression after commit:
7dfe32c5408916b6cb23f1ec48e473e1c728d300
Only align 16-bit entry on platforms that really require it,
indicated by selecting SIPI_VECTOR_IN_ROM in CPU Kconfig.
Disable assertion test of AP_SIPI_VECTOR for platforms not
depending on this feature.
Build of romstage should be fixed to get the vector address from
bootblock build automatically.
Change-Id: Ide470833c0254df1a9ff708369ab1c095ccfb98d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/875
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/intel/socket_mPGA604')
| -rw-r--r-- | src/cpu/intel/socket_mPGA604/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 4fa7569d85..0d4d45f872 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -11,6 +11,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy select MMX select SSE select UDELAY_TSC + select SIPI_VECTOR_IN_ROM # mPGA604 are usually Intel Netburst CPUs which should have SSE2 # but the ramtest.c code on the Dell S1850 seems to choke on |