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authorStefan Reinauer <stepan@coresystems.de>2010-03-17 02:09:12 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-17 02:09:12 +0000
commitd4ab7c5efbe3e8bc398dd541465bbfc5efe37035 (patch)
tree813cf5f9e46b052e59e973e1e6bb72b901bb06b8 /src/cpu/intel/socket_mPGA604
parent348a1ba589c784f8b15d7179b2d9488c2c31ccb6 (diff)
downloadcoreboot-d4ab7c5efbe3e8bc398dd541465bbfc5efe37035.tar.xz
fix dell s1850, ROMCC didn't seem to like SSE2 memtest here.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/socket_mPGA604')
-rw-r--r--src/cpu/intel/socket_mPGA604/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
index 2668174e71..faa74d3390 100644
--- a/src/cpu/intel/socket_mPGA604/Kconfig
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -6,3 +6,11 @@ config CPU_INTEL_SOCKET_MPGA604
select MMX
select SSE
select UDELAY_TSC
+
+# mPGA604 are usually Intel Netburst CPUs which should have SSE2
+# but the ramtest.c code on the Dell S1850 seems to choke on
+# enabling it, so disable it for now.
+config SSE2
+ bool
+ default n
+ depends on CPU_INTEL_SOCKET_MPGA604