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| author | efdesign98 <efdesign98@gmail.com> | 2011-07-20 20:11:46 -0600 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-07-22 08:22:59 +0200 |
| commit | 3cab93ce8ee8943a9e700535d36e0ceaab87b82e (patch) | |
| tree | 3961635e6d4264dd89be39cc16036b61e12f31c3 /src/cpu/intel/speedstep | |
| parent | 00c8c4a31632150fa711493f39e727da950ebe9f (diff) | |
| download | coreboot-3cab93ce8ee8943a9e700535d36e0ceaab87b82e.tar.xz | |
Add SSE3 dependent code
This change separates out changes that were initially found
in the commit for XHCI and AHCI changes to "arch/x86/Makefile.
inc". It also corrects a comment. The SSE3 dependent code
adds a pair of CR4 access functions and a blob of code that
re-sets CR4.OSFXSR and CR4.OSXMMEXCPT.
Change-Id: Id97256978da81589d97dcae97981a049101b5258
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/113
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu/intel/speedstep')
0 files changed, 0 insertions, 0 deletions