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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-27 23:13:39 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-30 23:07:55 +0200
commitc31384e62c98baf2fb847d55bb31a82f492ce265 (patch)
tree32f9eca6668d88f9862ac0a68ab0658f4371467b /src/cpu/intel
parentf69b46805c875c81af850af5567a18a934ce28bc (diff)
downloadcoreboot-c31384e62c98baf2fb847d55bb31a82f492ce265.tar.xz
Fix up Sandybridge C state generation code
This code fixes the sandybridge C state generation code to work with the current version of the ACPI code generator. Change-Id: I56ae1185dc0694c06976236523fdcbe5c1795b01 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/950 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/model_206ax/acpi.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c
index 3a3a1fd759..1a8ceb719c 100644
--- a/src/cpu/intel/model_206ax/acpi.c
+++ b/src/cpu/intel/model_206ax/acpi.c
@@ -76,12 +76,18 @@ static int generate_cstate_entries(acpi_cstate_t *cstates,
length += acpigen_write_byte(cstate_count);
/* Add an entry if the level is enabled */
- if (c1 > 0)
- length += acpigen_write_CST_package(1, &cstates[c1]);
- if (c2 > 0)
- length += acpigen_write_CST_package(2, &cstates[c2]);
- if (c3 > 0)
- length += acpigen_write_CST_package(3, &cstates[c3]);
+ if (c1 > 0) {
+ cstates[c1].ctype = 1;
+ length += acpigen_write_CST_package_entry(&cstates[c1]);
+ }
+ if (c2 > 0) {
+ cstates[c2].ctype = 2;
+ length += acpigen_write_CST_package_entry(&cstates[c2]);
+ }
+ if (c3 > 0) {
+ cstates[c2].ctype = 2;
+ length += acpigen_write_CST_package_entry(&cstates[c3]);
+ }
acpigen_patch_len(length - 1);
return length;