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author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-27 21:07:09 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-28 11:19:21 +0200 |
commit | 5477dca22323c7067455a22d6d0a8d06c40c4191 (patch) | |
tree | 5269812dc717df2ebba18fab9f17f9461ec6432e /src/cpu/intel | |
parent | 6f163a64c93356ba116be932d1c16eba3d40285e (diff) | |
download | coreboot-5477dca22323c7067455a22d6d0a8d06c40c4191.tar.xz |
intel: Remove pstate_coord_type.
Not used anywhere.
Change-Id: I9bab092d285aaebdf9283ba08e23197f9785b3a6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10329
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/fsp_model_206ax/chip.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/fsp_model_406dx/chip.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/haswell/chip.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/model_2065x/chip.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/chip.h | 2 |
5 files changed, 0 insertions, 10 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/chip.h b/src/cpu/intel/fsp_model_206ax/chip.h index 3041c53ac1..759a74cdde 100644 --- a/src/cpu/intel/fsp_model_206ax/chip.h +++ b/src/cpu/intel/fsp_model_206ax/chip.h @@ -23,8 +23,6 @@ struct cpu_intel_fsp_model_206ax_config { u8 disable_acpi; /* Do not generate CPU ACPI tables */ - u8 pstate_coord_type; /* Processor Coordination Type */ - int c1_battery; /* ACPI C1 on Battery Power */ int c2_battery; /* ACPI C2 on Battery Power */ int c3_battery; /* ACPI C3 on Battery Power */ diff --git a/src/cpu/intel/fsp_model_406dx/chip.h b/src/cpu/intel/fsp_model_406dx/chip.h index 155c00cd22..a59e4031d3 100644 --- a/src/cpu/intel/fsp_model_406dx/chip.h +++ b/src/cpu/intel/fsp_model_406dx/chip.h @@ -24,8 +24,6 @@ #define SPEEDSTEP_APIC_MAGIC 0xACAC struct cpu_intel_fsp_model_406dx_config { - u8 pstate_coord_type; /* Processor Coordination Type */ - int c1_battery; /* ACPI C1 on Battery Power */ int c2_battery; /* ACPI C2 on Battery Power */ int c3_battery; /* ACPI C3 on Battery Power */ diff --git a/src/cpu/intel/haswell/chip.h b/src/cpu/intel/haswell/chip.h index 92823a6b4a..89d168d9f8 100644 --- a/src/cpu/intel/haswell/chip.h +++ b/src/cpu/intel/haswell/chip.h @@ -25,8 +25,6 @@ extern struct chip_operations cpu_intel_haswell_ops; struct cpu_intel_haswell_config { u8 disable_acpi; /* Do not generate CPU ACPI tables */ - u8 pstate_coord_type; /* Processor Coordination Type */ - int c1_battery; /* ACPI C1 on Battery Power */ int c2_battery; /* ACPI C2 on Battery Power */ int c3_battery; /* ACPI C3 on Battery Power */ diff --git a/src/cpu/intel/model_2065x/chip.h b/src/cpu/intel/model_2065x/chip.h index f6776110c3..550d47882b 100644 --- a/src/cpu/intel/model_2065x/chip.h +++ b/src/cpu/intel/model_2065x/chip.h @@ -23,8 +23,6 @@ struct cpu_intel_model_2065x_config { u8 disable_acpi; /* Do not generate CPU ACPI tables */ - u8 pstate_coord_type; /* Processor Coordination Type */ - int c1_battery; /* ACPI C1 on Battery Power */ int c2_battery; /* ACPI C2 on Battery Power */ int c3_battery; /* ACPI C3 on Battery Power */ diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index 10bca53792..c690d52f2e 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -23,8 +23,6 @@ struct cpu_intel_model_206ax_config { u8 disable_acpi; /* Do not generate CPU ACPI tables */ - u8 pstate_coord_type; /* Processor Coordination Type */ - int c1_battery; /* ACPI C1 on Battery Power */ int c2_battery; /* ACPI C2 on Battery Power */ int c3_battery; /* ACPI C3 on Battery Power */ |