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| author | Idwer Vollering <vidwer@gmail.com> | 2014-03-11 15:36:21 +0000 |
|---|---|---|
| committer | Idwer Vollering <vidwer@gmail.com> | 2014-03-16 21:42:49 +0100 |
| commit | 5809a7395d49122757a0ebdfa120e023ebe876ba (patch) | |
| tree | c178320e69a870cae3a6f94d0547aa40ced3ac2e /src/cpu/intel | |
| parent | c078094f39d8683b9a1087dc7f60e8605733ed99 (diff) | |
| download | coreboot-5809a7395d49122757a0ebdfa120e023ebe876ba.tar.xz | |
Make POST device configurable.
Change-Id: If92b50ab3888518228d2d3b76f5c50c4aef968dd
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/4561
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/fsp_model_206ax/cache_as_ram.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/cache_as_ram.inc b/src/cpu/intel/fsp_model_206ax/cache_as_ram.inc index 61fb1c2636..a269fb9691 100644 --- a/src/cpu/intel/fsp_model_206ax/cache_as_ram.inc +++ b/src/cpu/intel/fsp_model_206ax/cache_as_ram.inc @@ -251,8 +251,8 @@ halt2: .Lhlt: xchg %al, %ah -#if CONFIG_IO_POST - outb %al, $CONFIG_IO_POST_PORT +#if CONFIG_POST_IO + outb %al, $CONFIG_POST_IO_PORT #else post_code(POST_DEAD_CODE) #endif |