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authorElyes HAOUAS <ehaouas@noos.fr>2019-03-16 08:40:06 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-16 11:46:58 +0000
commit74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d (patch)
treef4b9a4812620dedae0d786340bbf18ab247cc395 /src/cpu/intel
parent4b7202e250b322e6347de5483abb61bbf92de18c (diff)
downloadcoreboot-74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d.tar.xz
src: Drop unused '#include <halt.h>'
Change-Id: Ie7afe77053a21bcf6a1bf314570f897d1791a620 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 1e5f3d3656..e64643aa1e 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -21,7 +21,6 @@
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
-#include <halt.h>
#include <lib.h>
#include <timestamp.h>
#include <device/pci_def.h>