summaryrefslogtreecommitdiff
path: root/src/cpu/intel
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-10-27 09:41:02 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-11-12 09:22:18 +0000
commitd2b9ec13622d34714b4ecf8b9daf53b32665d3d7 (patch)
tree205a6f66c9ece4b05010b0c33a8c174bc954249c /src/cpu/intel
parenta9a1913d4d3f27f681b6ef980f064b57da8c1a68 (diff)
downloadcoreboot-d2b9ec13622d34714b4ecf8b9daf53b32665d3d7.tar.xz
src: Remove unneeded include "{arch,cpu}/cpu.h"
Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/car/romstage.c1
-rw-r--r--src/cpu/intel/fsp_model_206ax/finalize.c2
-rw-r--r--src/cpu/intel/fsp_model_406dx/bootblock.c1
-rw-r--r--src/cpu/intel/haswell/bootblock.c1
-rw-r--r--src/cpu/intel/haswell/finalize.c2
-rw-r--r--src/cpu/intel/haswell/romstage.c1
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c1
-rw-r--r--src/cpu/intel/hyperthreading/intel_sibling.c1
-rw-r--r--src/cpu/intel/microcode/microcode.c2
-rw-r--r--src/cpu/intel/model_2065x/finalize.c2
-rw-r--r--src/cpu/intel/model_206ax/finalize.c2
-rw-r--r--src/cpu/intel/slot_1/l2_cache.c1
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c1
13 files changed, 5 insertions, 13 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index c36e0468e7..164f1219a1 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/fsp_model_206ax/finalize.c b/src/cpu/intel/fsp_model_206ax/finalize.c
index d143497e2e..8655402599 100644
--- a/src/cpu/intel/fsp_model_206ax/finalize.c
+++ b/src/cpu/intel/fsp_model_206ax/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include "model_206ax.h"
diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c
index 327c4a4ce9..13c5d0f767 100644
--- a/src/cpu/intel/fsp_model_406dx/bootblock.c
+++ b/src/cpu/intel/fsp_model_406dx/bootblock.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode/microcode.c>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 57e1bbb30f..3a306b5729 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c
index b170215ed3..cc2d1a4c36 100644
--- a/src/cpu/intel/haswell/finalize.c
+++ b/src/cpu/intel/haswell/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include "haswell.h"
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 8c65dae237..7e4efa735c 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -19,7 +19,6 @@
#include <console/console.h>
#include <arch/cpu.h>
#include <cf9_reset.h>
-#include <cpu/cpu.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 324c5189f9..36ea92a7fc 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c
index d9654702e6..b05d3d45e1 100644
--- a/src/cpu/intel/hyperthreading/intel_sibling.c
+++ b/src/cpu/intel/hyperthreading/intel_sibling.c
@@ -12,7 +12,6 @@
*/
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/hyperthreading.h>
#include <device/device.h>
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index ae34347e26..d217cfd0bf 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -24,7 +24,7 @@
#else
#include <arch/cbfs.h>
#endif
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/microcode.h>
#include <rules.h>
diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c
index 08541c0d89..5b85601182 100644
--- a/src/cpu/intel/model_2065x/finalize.c
+++ b/src/cpu/intel/model_2065x/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include "model_2065x.h"
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index 5c69ffc368..30b00bbaf1 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include "model_206ax.h"
diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c
index 617a4e6644..7821ad1ff5 100644
--- a/src/cpu/intel/slot_1/l2_cache.c
+++ b/src/cpu/intel/slot_1/l2_cache.c
@@ -40,7 +40,6 @@
#include <stdint.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/intel/l2_cache.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index 15caa0f57b..426eae5eab 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -21,7 +21,6 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>