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authorArthur Heymans <arthur@aheymans.xyz>2018-07-21 15:03:06 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-01-24 13:42:36 +0000
commitdf7aecd92643d207feaf7fd840f8835097346644 (patch)
tree86ca82a7935bf26bd3edd8971f60df63948fad95 /src/cpu/intel
parent845a96dfd601c08f2d5c2cf362a7021f912c4857 (diff)
downloadcoreboot-df7aecd92643d207feaf7fd840f8835097346644.tar.xz
cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR
Some CPUs, (Intel core2 and pineview) have slightly different SMRR MTRR mechanism. The MSR_SMRR_PHYSBASE/MASK MSRs are at a different location, have slightly different semantics and need SMRR enable in a locked down IA32_FEATURE_CONTROL MSR. This change takes away the possibility to (not) lock IA32_FEATURE_CONTROL on these CPUs, as this is needed for SMRR MSR to work. Since sockets cover multiple CPUs of which only some support SMRR, the Kconfig option CONFIG_SET_IA32_FC_LOCK_BIT is kept in place, even though it gets meaningless on those CPUs. Locking that bit was the default anyway. With this patch Intel Netburst CPUs also configure IA32_FEATURE_CONTROL. According to Intel 64 and IA-32 Architectures Software Developer's Manual those CPUs support that MSR so issues are not to be expected. Change-Id: Ia85602e75385e24ebded75e6e6dd38ccc969a76b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/27586 Tested-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/model_1067x/model_1067x_init.c3
-rw-r--r--src/cpu/intel/model_1067x/mp_init.c18
-rw-r--r--src/cpu/intel/model_106cx/model_106cx_init.c3
-rw-r--r--src/cpu/intel/model_6ex/model_6ex_init.c3
-rw-r--r--src/cpu/intel/model_6fx/model_6fx_init.c3
5 files changed, 18 insertions, 12 deletions
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index 275ff70267..6068be166d 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -287,9 +287,6 @@ static void model_1067x_init(struct device *cpu)
/* Initialize the APIC timer */
init_timer();
- /* Set virtualization based on Kconfig option */
- set_vmx_and_lock();
-
/* Configure C States */
configure_c_states(quad);
diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
index 52e9d3f010..ab7785989d 100644
--- a/src/cpu/intel/model_1067x/mp_init.c
+++ b/src/cpu/intel/model_1067x/mp_init.c
@@ -49,8 +49,26 @@ static void pre_mp_smm_init(void)
smm_initialize();
}
+#define SMRR_SUPPORTED (1 << 11)
+
static void per_cpu_smm_trigger(void)
{
+ msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
+ if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
+ set_feature_ctrl_vmx();
+ msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
+ /* We don't care if the lock is already setting
+ as our smm relocation handler is able to handle
+ setups where SMRR is not enabled here. */
+ if (!IS_ENABLED(CONFIG_SET_IA32_FC_LOCK_BIT))
+ printk(BIOS_INFO,
+ "Overriding CONFIG_SET_IA32_FC_LOCK_BIT to enable SMRR\n");
+ ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
+ wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
+ } else {
+ set_vmx_and_lock();
+ }
+
/* Relocate the SMM handler. */
smm_relocate();
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index 75e110683e..e44302606e 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -88,9 +88,6 @@ static void model_106cx_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
- /* Set virtualization based on Kconfig option */
- set_vmx_and_lock();
-
/* Configure C States */
configure_c_states();
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index 72a259d34f..19a22f1839 100644
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -125,9 +125,6 @@ static void model_6ex_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
- /* Set virtualization based on Kconfig option */
- set_vmx_and_lock();
-
/* Configure C States */
configure_c_states();
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index 16ddcc4c28..4e198961ce 100644
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -139,9 +139,6 @@ static void model_6fx_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
- /* Set virtualization based on Kconfig option */
- set_vmx_and_lock();
-
/* Configure C States */
configure_c_states();