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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-27 16:40:25 +0200
committerNico Huber <nico.h@gmx.de>2019-03-29 20:00:20 +0000
commiteb789f0b79aa99e214ccefc04f9f78b550f52f32 (patch)
tree59f72703d67577e4aaf76e276ddd442b583cbc14 /src/cpu/intel
parent28fa33ccbce042d09daf64efa2097b67570ad4af (diff)
downloadcoreboot-eb789f0b79aa99e214ccefc04f9f78b550f52f32.tar.xz
src: Use include <reset.h> when appropriate
Change-Id: I3b852cae4ef84d257bf1e5486447583bdd16b441 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29301 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/fsp_model_406dx/bootblock.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c
index 2ffbd8b09c..14cfad9de1 100644
--- a/src/cpu/intel/fsp_model_406dx/bootblock.c
+++ b/src/cpu/intel/fsp_model_406dx/bootblock.c
@@ -21,7 +21,6 @@
#include <cpu/x86/mtrr.h>
#include <arch/io.h>
#include <device/pci_ops.h>
-#include <reset.h>
#include <southbridge/intel/fsp_rangeley/soc.h>
#include "model_406dx.h"