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| author | David Hendricks <dhendrix@chromium.org> | 2013-08-22 16:52:38 -0700 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-07 23:54:54 +0200 |
| commit | 0ffa11bdbba48defc55cd38fb2aa2492ca2b5492 (patch) | |
| tree | 1623c55ad49d4f34cd5d3edaa409a535e69120c7 /src/cpu/intel | |
| parent | ee4bfbf3e142b17bf263f5ddb3840ed683a04635 (diff) | |
| download | coreboot-0ffa11bdbba48defc55cd38fb2aa2492ca2b5492.tar.xz | |
exynos5420: Set the CLK_DIV_CPERI1 value as per manual
Set the CLK_DIV_CPERI1 value as recommended by the
0.02 UM section 7.9.1.25.
This suggests to use 0x3F3F0000 as the value to be
set to save power.
This is ported from https://gerrit.chromium.org/gerrit/#/c/64905
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I89a6a72d20374a513019a272628a05e139b31773
Reviewed-on: https://gerrit.chromium.org/gerrit/66787
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
(cherry picked from commit 34be13b008e262c641268b7c1c6a08e49f18fc37)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6512
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel')
0 files changed, 0 insertions, 0 deletions