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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-09 20:30:52 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-13 08:37:01 +0000 |
| commit | 34856579f8e9349104cfdd0245a2b966bc59a7ea (patch) | |
| tree | 9f32c9ceb13c7e8ec3ab9563628a6dc49b03623d /src/cpu/intel | |
| parent | 95b3ba526419ca4de04d200b00b267b50576c7c9 (diff) | |
| download | coreboot-34856579f8e9349104cfdd0245a2b966bc59a7ea.tar.xz | |
arch/x86: Drop Kconfig AP_SIPI_VECTOR
This was used to check romcc-built bootblock and romstage
agree about the location of 16-bit entrypoint. There was
no need to customize it as bootblock size requirement did
not grow. Just check for a fixed location at 4 GiB - 4 KiB.
With C_ENVIRONMENT_BOOTBLOCK we can have a proper symbol
for the purpose, since it appears in the same compilation
unit. It will adjust if C_ENV_BOOTBLOCK_SIZE changes.
Change-Id: I93f3c37e78ba587455c804de8c57e7e06832a81f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/car/p4-netburst/cache_as_ram.S | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S index bdce514cd5..fda572d659 100644 --- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S +++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S @@ -23,7 +23,10 @@ /* Macro to access Local APIC registers at default base. */ #define LAPIC(x) $(LAPIC_DEFAULT_BASE | LAPIC_ ## x) -#define START_IPI_VECTOR ((CONFIG_AP_SIPI_VECTOR >> 12) & 0xff) +#if !IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK) +/* Fixed location, ASSERTED in failover.ld if it changes. */ +.set ap_sipi_vector_in_rom, 0xff +#endif #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE @@ -180,7 +183,8 @@ hyper_threading_cpu: /* Send Start IPI to all excluding ourself. */ movl LAPIC(ICR), %edi - movl $(LAPIC_DEST_ALLBUT | LAPIC_DM_STARTUP | START_IPI_VECTOR), %eax + movl $(LAPIC_DEST_ALLBUT | LAPIC_DM_STARTUP), %eax + orl $ap_sipi_vector_in_rom, %eax 1: movl %eax, (%edi) movl $0x30, %ecx 2: pause |