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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-15 18:31:03 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-16 04:26:26 +0100
commit4dddda294f12c14d5e8310b84d1e9a60149e376a (patch)
tree6c089d9d228325aa13dee507e5966f77afd51c7c /src/cpu/intel
parentcdc50480c414df3b5f438f7f26a73df597e544ae (diff)
downloadcoreboot-4dddda294f12c14d5e8310b84d1e9a60149e376a.tar.xz
cpu/intel: Fix the remaining issues detected by checkpatch
Fix the following error and warnings detected by checkpatch.pl: ERROR: switch and case should be at the same indent WARNING: Consecutive strings are generally better as a single string WARNING: static const char * array should probably be static const char * const TEST=Build and run on Galileo Gen2 Change-Id: I03d5d0d2db0d5e9b33c8ec807b236fe229bcc8f3 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18851 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/speedstep/acpi.c18
-rw-r--r--src/cpu/intel/turbo/turbo.c2
2 files changed, 10 insertions, 10 deletions
diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c
index f801307627..b4aaa87564 100644
--- a/src/cpu/intel/speedstep/acpi.c
+++ b/src/cpu/intel/speedstep/acpi.c
@@ -50,13 +50,13 @@ static int get_fsb(void)
{
const u32 fsbcode = rdmsr(MSR_FSB_FREQ).lo & 7;
switch (fsbcode) {
- case 0: return 800; /* / 3 == 266 */
- case 1: return 400; /* / 3 == 133 */
- case 2: return 600; /* / 3 == 200 */
- case 3: return 500; /* / 3 == 166 */
- case 4: return 1000; /* / 3 == 333 */
- case 5: return 300; /* / 3 == 100 */
- case 6: return 1200; /* / 3 == 400 */
+ case 0: return 800; /* / 3 == 266 */
+ case 1: return 400; /* / 3 == 133 */
+ case 2: return 600; /* / 3 == 200 */
+ case 3: return 500; /* / 3 == 166 */
+ case 4: return 1000; /* / 3 == 333 */
+ case 5: return 300; /* / 3 == 100 */
+ case 6: return 1200; /* / 3 == 400 */
}
printk(BIOS_WARNING,
"Warning: No supported FSB frequency. Assuming 200MHz\n");
@@ -84,8 +84,8 @@ static void gen_pstate_entries(const sst_table_t *const pstates,
/ (pstates->states[pstates->num_states - 1].is_slfm ? 12 : 6),
(max_ratio2 * fsb3) / 6);
- printk(BIOS_DEBUG, "adding %x P-States between "
- "busratio %x and %x, ""incl. P0\n",
+ printk(BIOS_DEBUG,
+ "adding %x P-States between busratio %x and %x, incl. P0\n",
pstates->num_states, min_ratio2 / 2, max_ratio2 / 2);
acpigen_write_package(pstates->num_states);
for (i = 0; i < pstates->num_states; ++i) {
diff --git a/src/cpu/intel/turbo/turbo.c b/src/cpu/intel/turbo/turbo.c
index 7d15c81a7b..ac6627372b 100644
--- a/src/cpu/intel/turbo/turbo.c
+++ b/src/cpu/intel/turbo/turbo.c
@@ -42,7 +42,7 @@ static inline void set_global_turbo_state(int state)
}
#endif
-static const char *turbo_state_desc[] = {
+static const char * const turbo_state_desc[] = {
[TURBO_UNKNOWN] = "unknown",
[TURBO_UNAVAILABLE] = "unavailable",
[TURBO_DISABLED] = "available but hidden",