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authorAngel Pons <th3fanbus@gmail.com>2020-09-24 18:15:55 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-09-27 22:46:31 +0000
commita5768f535bbc7083b59ae1f7f73c37cd29c031bc (patch)
treeb92871c1cb698b154b10329e4fed904565cd0128 /src/cpu/intel
parentf6cf4927e2edf879929338b4889b6f1915d7a5c1 (diff)
downloadcoreboot-a5768f535bbc7083b59ae1f7f73c37cd29c031bc.tar.xz
cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercase
This is to align Haswell and Broadwell. Change-Id: I8585597a8de164fb8d3b33db0d95c3aaf3cd7afc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45711 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 39e71fe025..abc005c6f0 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -109,7 +109,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
msr_t mtrr_cap;
struct smm_relocation_params *relo_params = &smm_reloc_params;
- printk(BIOS_DEBUG, "In relocation handler: cpu %d\n", cpu);
+ printk(BIOS_DEBUG, "In relocation handler: CPU %d\n", cpu);
/* Determine if the processor supports saving state in MSRs. If so,
* enable it before the non-BSPs run so that SMM relocation can occur