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authorDuncan Laurie <dlaurie@chromium.org>2012-06-25 09:53:58 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-24 23:39:58 +0200
commit4e4320f524a4695b5987e6bbffcfc48af89dac26 (patch)
tree6a641f388b940f4d287e3ad0b563423b8e358e11 /src/cpu/intel
parent77dbbac7e710c279c8208a5e5f5e766ef4565524 (diff)
downloadcoreboot-4e4320f524a4695b5987e6bbffcfc48af89dac26.tar.xz
CPU: Update ivybridge PP1 current limit value
The BWG says ivybridge current limit for PP1 is 50A. Verify the PP1 current limit value on link device: > echo $(( ( $(rdmsr 0 0x602) & 0x1fff ) >> 3 )) 50 Change-Id: I946269d21ef605f2525fe03993f569d69128294b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1305 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/model_206ax/model_206ax.h3
-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c5
2 files changed, 6 insertions, 2 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h
index d482ff0108..fbd57a5c19 100644
--- a/src/cpu/intel/model_206ax/model_206ax.h
+++ b/src/cpu/intel/model_206ax/model_206ax.h
@@ -75,7 +75,8 @@
#define MSR_PP0_CURRENT_CONFIG 0x601
#define PP0_CURRENT_LIMIT (112 << 3) /* 112 A */
#define MSR_PP1_CURRENT_CONFIG 0x602
-#define PP1_CURRENT_LIMIT (35 << 3) /* 35 A */
+#define PP1_CURRENT_LIMIT_SNB (35 << 3) /* 35 A */
+#define PP1_CURRENT_LIMIT_IVB (50 << 3) /* 50 A */
#define MSR_PKG_POWER_SKU_UNIT 0x606
#define MSR_PKG_POWER_SKU 0x614
#define MSR_PP0_POWER_LIMIT 0x638
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 0958fe366e..08757d138a 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -311,7 +311,10 @@ static void configure_c_states(void)
/* Secondary Plane Current Limit */
msr = rdmsr(MSR_PP1_CURRENT_CONFIG);
msr.lo &= ~0x1fff;
- msr.lo |= PP1_CURRENT_LIMIT;
+ if (cpuid_eax(1) >= 0x30600)
+ msr.lo |= PP1_CURRENT_LIMIT_IVB;
+ else
+ msr.lo |= PP1_CURRENT_LIMIT_SNB;
wrmsr(MSR_PP1_CURRENT_CONFIG, msr);
}