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authorPatrick Georgi <patrick@georgi-clan.de>2012-03-31 13:08:12 +0200
committerMathias Krause <minipli@googlemail.com>2012-03-31 18:06:09 +0200
commit819c7d4a35b7b11a832d8e52d34b6f5b32e24cc4 (patch)
tree9b7d1074ee2d90417859cf470f99230e4ddad2f2 /src/cpu/intel
parent087b24db2d7b4e3f6f6ec238b958835c67f5cd42 (diff)
downloadcoreboot-819c7d4a35b7b11a832d8e52d34b6f5b32e24cc4.tar.xz
Whitespace fixes
Change-Id: I441326ecbda72ec7e99fc99bf40a81aa7e94ee26 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/834 Tested-by: build bot (Jenkins) Reviewed-by: Mathias Krause <minipli@googlemail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/car/cache_as_ram_ht.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index 2485e20e5e..ca107c4c56 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -128,7 +128,7 @@ bsp_init:
jnz 1b
post_code(0x24)
-
+
/* For a hyper-threading processor, cache must not be disabled
* on an AP on the same physical package with the BSP.
*/