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author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-30 11:44:29 +1000 |
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committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-30 23:33:35 +0200 |
commit | 370adeedb455a0d3880637ddfc3b8afee6080b5c (patch) | |
tree | a111f67f32ad57f10013636024c6c840aec4e118 /src/cpu/intel | |
parent | d11ff6b9dfae82266fd9862421e395f6d9c436dc (diff) | |
download | coreboot-370adeedb455a0d3880637ddfc3b8afee6080b5c.tar.xz |
model_206ax_init.c: Trivial - fix indent
Change-Id: I84876c95522fca5560bcbc8e81dfcb09faf3b326
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6412
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/fsp_model_206ax/model_206ax_init.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c index d0b2d3d780..c2f9f196e1 100644 --- a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c +++ b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c @@ -65,9 +65,9 @@ static void enable_vmx(void) printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); + msr.lo |= (1 << 2); + if (regs.ecx & CPUID_SMX) + msr.lo |= (1 << 1); } wrmsr(IA32_FEATURE_CONTROL, msr); |