diff options
| author | Martin Roth <gaumless@gmail.com> | 2017-10-15 15:14:38 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:25:26 +0000 |
| commit | 0a19b080ef03ba50d111bd966c45ca90cf1507d6 (patch) | |
| tree | b047d42cd509f584d759ab2cac01457e150f5d54 /src/cpu/intel | |
| parent | 264566c177dac98e67c2a4765fe08c5d8de10753 (diff) | |
| download | coreboot-0a19b080ef03ba50d111bd966c45ca90cf1507d6.tar.xz | |
Intel i82830 boards & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
cpu/intel/socket_mFCBGA479
northbridge/intel/i82830
Mainboards:
mainboard/rca/rm4100
mainboard/thomson/ip1000
Change-Id: I9574179516c30bb0d6a29741254293c2cc6f12e9
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/socket_mFCBGA479/Kconfig | 17 | ||||
| -rw-r--r-- | src/cpu/intel/socket_mFCBGA479/Makefile.inc | 10 |
3 files changed, 0 insertions, 28 deletions
diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 4871db3388..fdd341a7bb 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -10,7 +10,6 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FC_PGA370) += socket_FC_PGA370 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA1023) += socket_FCBGA1023 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCBGA479) += socket_mFCBGA479 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478) += socket_mPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN diff --git a/src/cpu/intel/socket_mFCBGA479/Kconfig b/src/cpu/intel/socket_mFCBGA479/Kconfig deleted file mode 100644 index 74508549e3..0000000000 --- a/src/cpu/intel/socket_mFCBGA479/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -config CPU_INTEL_SOCKET_MFCBGA479 - bool - select CPU_INTEL_MODEL_6BX - select MMX - select SSE - -if CPU_INTEL_SOCKET_MFCBGA479 - -config DCACHE_RAM_BASE - hex - default 0xc8000 - -config DCACHE_RAM_SIZE - hex - default 0x08000 - -endif diff --git a/src/cpu/intel/socket_mFCBGA479/Makefile.inc b/src/cpu/intel/socket_mFCBGA479/Makefile.inc deleted file mode 100644 index 918a54e800..0000000000 --- a/src/cpu/intel/socket_mFCBGA479/Makefile.inc +++ /dev/null @@ -1,10 +0,0 @@ -subdirs-y += ../model_6bx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode - -cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc -romstage-y += ../car/romstage_legacy.c |