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authorAaron Durbin <adurbin@chromium.org>2013-01-12 01:07:28 -0600
committerRonald G. Minnich <rminnich@gmail.com>2013-03-18 17:09:01 +0100
commit24614af9b85bc615b0d9af3f37fa393de039c9f8 (patch)
tree512445275e7bb802ea188fb895a2f347c476ed7e /src/cpu/intel
parenta416bfecedb7d55cf3c631d230e3500b314fc880 (diff)
downloadcoreboot-24614af9b85bc615b0d9af3f37fa393de039c9f8.tar.xz
haswell: Clear correct number of MCA banks
The configure_mca() function was hard coding the number of banks the cpu supported. Query this dynamically so that it no longer clears only 7 banks. Change-Id: I33fce8fadc0facd1016b3295faaf3ae90e490a71 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2745 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/haswell_init.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 762b7e81a9..45c1a25bc0 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -424,11 +424,17 @@ static void set_energy_perf_bias(u8 policy)
static void configure_mca(void)
{
msr_t msr;
+ const unsigned int mcg_cap_msr = 0x179;
int i;
+ int num_banks;
+ msr = rdmsr(mcg_cap_msr);
+ num_banks = msr.lo & 0xff;
msr.lo = msr.hi = 0;
- /* This should only be done on a cold boot */
- for (i = 0; i < 7; i++)
+ /* TODO(adurbin): This should only be done on a cold boot. Also, some
+ * of these banks are core vs package scope. For now every CPU clears
+ * every bank. */
+ for (i = 0; i < num_banks; i++)
wrmsr(IA32_MC0_STATUS + (i * 4), msr);
}