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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2015-06-06 19:48:25 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-08 00:55:07 +0200 |
| commit | 52648623e03e6769ae73ef8ee999d671fb657d62 (patch) | |
| tree | 2e0c7675c40463cb7864b0b119e50eeadf892a78 /src/cpu/intel | |
| parent | 4ba3b79537008b4d2448848901212cf2251188d1 (diff) | |
| download | coreboot-52648623e03e6769ae73ef8ee999d671fb657d62.tar.xz | |
Remove empty lines at end of file
Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;
Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram_ht.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/fit/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/cache_as_ram.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_2065x/cache_as_ram.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/cache_as_ram.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/slot_2/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/socket_PGA370/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/socket_mPGA604/Kconfig | 1 |
10 files changed, 0 insertions, 10 deletions
diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index 7ada0dd267..1d8ea8d844 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -368,4 +368,3 @@ __main: post_code(POST_DEAD_CODE) hlt jmp .Lhlt - diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index 49c7746b9a..29d7113600 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -450,4 +450,3 @@ mtrr_table: .word 0x208, 0x209, 0x20A, 0x20B .word 0x20C, 0x20D, 0x20E, 0x20F mtrr_table_end: - diff --git a/src/cpu/intel/fit/Kconfig b/src/cpu/intel/fit/Kconfig index 9b57556827..e48dca9f70 100644 --- a/src/cpu/intel/fit/Kconfig +++ b/src/cpu/intel/fit/Kconfig @@ -9,4 +9,3 @@ config CPU_INTEL_NUM_FIT_ENTRIES depends on CPU_INTEL_FIRMWARE_INTERFACE_TABLE help This option selects the number of empty entries in the FIT table. - diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc index 0266aa81ea..595b4df8b1 100644 --- a/src/cpu/intel/haswell/cache_as_ram.inc +++ b/src/cpu/intel/haswell/cache_as_ram.inc @@ -318,4 +318,3 @@ mtrr_table: .word 0x20C, 0x20D, 0x20E, 0x20F .word 0x210, 0x211, 0x212, 0x213 mtrr_table_end: - diff --git a/src/cpu/intel/model_2065x/cache_as_ram.inc b/src/cpu/intel/model_2065x/cache_as_ram.inc index ab291abea9..62f816acfd 100644 --- a/src/cpu/intel/model_2065x/cache_as_ram.inc +++ b/src/cpu/intel/model_2065x/cache_as_ram.inc @@ -293,4 +293,3 @@ mtrr_table: .word 0x26B, 0x26C, 0x26D .word 0x26E, 0x26F mtrr_table_end: - diff --git a/src/cpu/intel/model_206ax/cache_as_ram.inc b/src/cpu/intel/model_206ax/cache_as_ram.inc index f2754c52d0..f54c691b9a 100644 --- a/src/cpu/intel/model_206ax/cache_as_ram.inc +++ b/src/cpu/intel/model_206ax/cache_as_ram.inc @@ -332,4 +332,3 @@ mtrr_table: .word 0x20C, 0x20D, 0x20E, 0x20F .word 0x210, 0x211, 0x212, 0x213 mtrr_table_end: - diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc index d58d1325c8..d7d932e817 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram.inc +++ b/src/cpu/intel/model_6ex/cache_as_ram.inc @@ -244,4 +244,3 @@ mtrr_table: .word 0x208, 0x209, 0x20A, 0x20B .word 0x20C, 0x20D, 0x20E, 0x20F mtrr_table_end: - diff --git a/src/cpu/intel/slot_2/Kconfig b/src/cpu/intel/slot_2/Kconfig index 18a5b276d2..436230b964 100644 --- a/src/cpu/intel/slot_2/Kconfig +++ b/src/cpu/intel/slot_2/Kconfig @@ -24,4 +24,3 @@ config DCACHE_RAM_SIZE hex default 0x01000 depends on CPU_INTEL_SLOT_2 - diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig index 38230af5a0..9c3ba56f56 100644 --- a/src/cpu/intel/socket_PGA370/Kconfig +++ b/src/cpu/intel/socket_PGA370/Kconfig @@ -39,4 +39,3 @@ config DCACHE_RAM_SIZE default 0x01000 endif - diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 0d4d45f872..d5d668a202 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -29,4 +29,3 @@ config DCACHE_RAM_SIZE default 0x4000 endif # CPU_INTEL_SOCKET_MPGA604 - |