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authorStefan Reinauer <reinauer@chromium.org>2012-07-23 16:12:52 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-25 22:23:40 +0200
commit6d29c7352f4d410f75e740f3dd13de813107f1bd (patch)
tree76508a5af13e78e020b70e7317cc46646f718c75 /src/cpu/intel
parentdcc17ae3702b942ef67ebe194d6e9e560de127ef (diff)
downloadcoreboot-6d29c7352f4d410f75e740f3dd13de813107f1bd.tar.xz
Include SandyBridge Microcode when IvyBridge is enabled
.. in case the system has pluggable CPUs or might come in different SKUs. Change-Id: I7a7cd95b4de5dd78370355f448688e8d000434c1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1333 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/model_206ax/microcode_blob.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/cpu/intel/model_206ax/microcode_blob.h b/src/cpu/intel/model_206ax/microcode_blob.h
index d055b2e385..66e893b1c6 100644
--- a/src/cpu/intel/model_206ax/microcode_blob.h
+++ b/src/cpu/intel/model_206ax/microcode_blob.h
@@ -17,13 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-
-#if CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE
#include "microcode-m12206a7_00000025.h"
-#elif CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE
-#else
-#error "Which microcode to use?"
-#endif
/* Dummy terminator */
0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0,