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| author | Shelley Chen <shchen@chromium.org> | 2018-01-16 13:20:04 -0800 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2018-01-17 21:41:02 +0000 |
| commit | 4fef7818ecd002e5971ea6287e402fd9276b7266 (patch) | |
| tree | 2aeb6e4e79300428c04f7a26fbb43c0d3346f2d2 /src/cpu/intel | |
| parent | 630ea465b376bcaf133a5d20319a44dc3286fd6c (diff) | |
| download | coreboot-4fef7818ecd002e5971ea6287e402fd9276b7266.tar.xz | |
google/fizz: Fix barrel jack values for U42 and U22
Our current U22 skus (celeron and i3) actually don't support PL2,
but making sure that if we do decide in the future to use it to
make sure PL2 and PsysPl2 values are set appropriately.
BUG=b:71594855
BRANCH=None
TEST=Make sure that PsysPL2 value set to 90W with barrel jack for U42
and 65W with barrel jack for U22.
Change-Id: I084d0320128a6e05948023520a30c497c41be23b
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/23294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel')
0 files changed, 0 insertions, 0 deletions