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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-04 16:57:52 -0600
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-05 03:33:40 +0100
commitf589909b91e30cb826b18cf7a46299649edc53d6 (patch)
tree67992e24b85c689495d206051303d27d2645b86c /src/cpu/intel
parent55fa7f5c5f3f57779b3ba08ad6b33ddfb93bdd4d (diff)
downloadcoreboot-f589909b91e30cb826b18cf7a46299649edc53d6.tar.xz
cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig option
Commit * bdafcfa Add the Intel FSP 206ax CPU core support Introduced this option. This option was meant to have a board generate a CBFS file containing microcode. However, microcode generation used to be enabled by default when CPU_MICROCODE_IN_CBFS was selected. The introduction of BOARD_MICROCODE_CBFS_GENERATE killed that automatic default, which is not what we want. This option is misguided in the sense that it tends to introduce a non-default which had been intentionally a default. We now have to select two Kconfig options in order to generate microcode in CBFS, meaning one option is redundant. Change-Id: I3034833df1a9afa7d6d9d537484cb4ac89d30183 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4478 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/fsp_model_206ax/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index 406f8a5c95..dbff6e01e0 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_LAPIC
select SMM_TSEG
select CPU_MICROCODE_IN_CBFS if HAVE_FSP_BIN
- select BOARD_MICROCODE_CBFS_GENERATE
select TSC_SYNC_MFENCE
config BOOTBLOCK_CPU_INIT