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| author | Stefan Reinauer <stepan@coresystems.de> | 2009-10-24 18:46:08 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-10-24 18:46:08 +0000 |
| commit | 7833048e1f5cc7e33de9a276dde0a30349b6c7b3 (patch) | |
| tree | 8fa1e8c78db08719cf3acae4b8e2b8a74b6fe662 /src/cpu/ppc/ppc4xx/Config.lb | |
| parent | 95fca9e8f4ab2d6ec65d70880c849a3124a6a8bc (diff) | |
| download | coreboot-7833048e1f5cc7e33de9a276dde0a30349b6c7b3.tar.xz | |
drop support for various (old) PPC CPUs as per discussion from 9/10/9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/ppc/ppc4xx/Config.lb')
| -rw-r--r-- | src/cpu/ppc/ppc4xx/Config.lb | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/cpu/ppc/ppc4xx/Config.lb b/src/cpu/ppc/ppc4xx/Config.lb deleted file mode 100644 index 0b6f6233bb..0000000000 --- a/src/cpu/ppc/ppc4xx/Config.lb +++ /dev/null @@ -1,29 +0,0 @@ -## -## CPU initialization -## -uses CONFIG_RAMBASE -uses CONFIG_USE_DCACHE_RAM -uses CONFIG_DCACHE_RAM_BASE -uses CONFIG_DCACHE_RAM_SIZE - -## -## PPC4XX always uses cache ram for initial setup -## -default CONFIG_USE_DCACHE_RAM=1 -## Set dcache ram above coreboot image -default CONFIG_DCACHE_RAM_BASE=CONFIG_RAMBASE+0x100000 -## Dcache size is 16Kb -default CONFIG_DCACHE_RAM_SIZE=16384 - -initinclude "FAMILY_INIT" cpu/ppc/ppc4xx/ppc4xx.inc -initobject cache.S -initobject sdram.c -initobject clock.c - -config chip.h -object clock.o -object cache.S -object pci_domain.o -driver pci_bridge.o - -dir /cpu/simple_init |