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| author | Greg Watson <gwatson@lanl.gov> | 2005-10-19 20:32:05 +0000 |
|---|---|---|
| committer | Greg Watson <gwatson@lanl.gov> | 2005-10-19 20:32:05 +0000 |
| commit | 5fc3aa73eb5e978bcd37061c49932b10e80c45c2 (patch) | |
| tree | 6aea049b1f069925a439ff29f86ac83b3cf22b5f /src/cpu/ppc/ppc970 | |
| parent | a83620fda39ed5de8d8cce2579d656825ab1a793 (diff) | |
| download | coreboot-5fc3aa73eb5e978bcd37061c49932b10e80c45c2.tar.xz | |
get include files right
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/ppc/ppc970')
| -rw-r--r-- | src/cpu/ppc/ppc970/Config.lb | 12 | ||||
| -rw-r--r-- | src/cpu/ppc/ppc970/ppc970.inc | 6 |
2 files changed, 5 insertions, 13 deletions
diff --git a/src/cpu/ppc/ppc970/Config.lb b/src/cpu/ppc/ppc970/Config.lb index 3b430e27cb..60da7f2b71 100644 --- a/src/cpu/ppc/ppc970/Config.lb +++ b/src/cpu/ppc/ppc970/Config.lb @@ -3,17 +3,13 @@ ## uses _RAMBASE uses USE_DCACHE_RAM -uses DCACHE_RAM_BASE -uses DCACHE_RAM_SIZE ## -## Use cache ram for initial setup +## Assumes RAM already initialiazed +## This is true for the Apache board, but may +## not be for other 970 systems. ## -default USE_DCACHE_RAM=1 -## Set dcache ram above linuxbios image -default DCACHE_RAM_BASE=_RAMBASE+0x100000 -## Dcache size is 32Kb -default DCACHE_RAM_SIZE=0x8000 +default USE_DCACHE_RAM=0 initinclude "FAMILY_INIT" cpu/ppc/ppc970/ppc970.inc diff --git a/src/cpu/ppc/ppc970/ppc970.inc b/src/cpu/ppc/ppc970/ppc970.inc index 7ba48e4f8d..3d0f8cc3d4 100644 --- a/src/cpu/ppc/ppc970/ppc970.inc +++ b/src/cpu/ppc/ppc970/ppc970.inc @@ -29,9 +29,7 @@ | 10-Feb-04 Port to PPC970FX MPT +----------------------------------------------------------------------------*/ -#include <sys/as_archppc.h> -#include <sys/as_archppc970.h> -#include <ppc970fx_board.h> +#include <ppc970.h> /*----------------------------------------------------------------------------+ | Local defines. @@ -44,7 +42,6 @@ | Init_core. Assumption: hypervisor on, 64-bit on, HID1[10]=0, HID4[23]=0. | Data cahability must be turned on. Instruction cahability must be off. +----------------------------------------------------------------------------*/ -function_prolog(init_core) /*--------------------------------------------------------------------+ | Set time base to 0. +--------------------------------------------------------------------*/ @@ -366,4 +363,3 @@ function_prolog(init_core) eieio mtspr SPR_SRR0,r0 rfid - function_epilog(init_core) |