summaryrefslogtreecommitdiff
path: root/src/cpu/ppc
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2009-03-19 01:13:01 +0000
committerStefan Reinauer <stepan@openbios.org>2009-03-19 01:13:01 +0000
commitc675955f05411a78e7eec46faa5ce7ffd9bf481d (patch)
treea35f228f1f3b173141e75a8660c23e7d07c6a506 /src/cpu/ppc
parent1233054fbed27e65aabf370a2a4d42a050f980ec (diff)
downloadcoreboot-c675955f05411a78e7eec46faa5ce7ffd9bf481d.tar.xz
fix totalimpact briq compilation. the target had a cpu specific and a mainboard
specific clock.c. Since no other target uses the same cpu, I commented out the CPU's clock.c. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/ppc')
-rw-r--r--src/cpu/ppc/ppc7xx/Config.lb6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/ppc/ppc7xx/Config.lb b/src/cpu/ppc/ppc7xx/Config.lb
index d6e64b379b..521045b1bc 100644
--- a/src/cpu/ppc/ppc7xx/Config.lb
+++ b/src/cpu/ppc/ppc7xx/Config.lb
@@ -17,9 +17,11 @@ default DCACHE_RAM_SIZE=16384
initinclude "FAMILY_INIT" cpu/ppc/ppc7xx/ppc7xx.inc
-object clock.o
+# Only TotalImpact Briq uses the ppc7xx and it brings its own clock.o
+# so we comment this out for now:
+# object clock.o
object cache.S
-initobject clock.o
+#initobject clock.o
initobject cache.S
dir /cpu/simple_init