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| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2016-08-03 18:45:07 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-04 16:12:13 +0200 |
| commit | d03596f4ca9ff27f0483381eaca1a54d01a14165 (patch) | |
| tree | 3909f77cf59140f4b4f527b848f135c4653bb604 /src/cpu/qemu-power8 | |
| parent | e85de02fd41abe2533771128c535da5187ddf275 (diff) | |
| download | coreboot-d03596f4ca9ff27f0483381eaca1a54d01a14165.tar.xz | |
soc/intel/skylake: Correct address of I2C5 Device
This corrects the address of the I2C5 Device. The I2C
Controller #5 is on PCI Bus 0: Device 25: Function 1. The ACPI
Address Encoding Logic is - High word = Device #.
Low word = Function #.
So, I2C5 (_ADR) = 0x0019 0001.
BUG=none
BRANCH=none
TEST=Build and boot kunimitsu
Change-Id: I4719a843260ef58cc2307e909e9ccbffea519177
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/16048
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/qemu-power8')
0 files changed, 0 insertions, 0 deletions