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author | David Hendricks <dhendrix@chromium.org> | 2013-05-02 14:23:51 -0700 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-05 00:18:48 +0200 |
commit | 0bb875be5e575b6eceb081d1a92da467b87aa96b (patch) | |
tree | acb7e0664c1297d95eff2f279c66711e72c4432c /src/cpu/samsung/exynos5250/Makefile.inc | |
parent | c2f177737bb2ae1836b3badeb90daf6bdcc2134f (diff) | |
download | coreboot-0bb875be5e575b6eceb081d1a92da467b87aa96b.tar.xz |
exynos5/5250: Update timer call sites to use monotonic timer API
This goes thru various call sites where we used timer_us() and updates
them to use the new monotonic timer API.
udelay() changed substantially and now gracefully handles wraparound.
Change-Id: Ie2cc86a4125cf0de12837fd7d337a11aed25715c
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3176
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/samsung/exynos5250/Makefile.inc')
-rw-r--r-- | src/cpu/samsung/exynos5250/Makefile.inc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 403c198fa5..2cd34284b4 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -7,6 +7,7 @@ bootblock-y += pinmux.c mct.c power.c # Clock is required for UART bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c +bootblock-$(CONFIG_EARLY_CONSOLE) += monotonic_timer.c bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c @@ -17,6 +18,7 @@ romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c +romstage-y += monotonic_timer.c romstage-$(CONFIG_EARLY_CONSOLE) += soc.c romstage-$(CONFIG_EARLY_CONSOLE) += uart.c @@ -30,6 +32,7 @@ ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c ramstage-y += exynos5250-tmu.c ramstage-y += mct.c +ramstage-y += monotonic_timer.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c |