exynos5: Refactor crazy old U-Boot base address macros away

All this samsung_get_base_address_of_device_with_a_really_long_name()
boilerplate makes my eyes bleed... I think there are so much cleaner
ways to do this. Unfortunately changing this ends up touching nearly
every Exynos5 file, but I hope you agree that it's worth it (and the
sooner we get it over with, the better... I can't bring myself to make
another device fit into that ugly scheme).

This also removes the redundant EXYNOS5 base address definitions from
the 5420 directory when there are EXYNOS5420 ones, to avoid complete
confusion. The new scheme tries to use EXYNOS5 for base addresses and
exynos5 for types that are common between the two processors, and
EXYNOS5420/exynos5420 for things that have changes (although I probably
didn't catch all differences).

Change-Id: I87e58434490ed55a9bbe743af1f9bf2520dec13f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167579
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit 66c87693352c248eec029c1ce83fb295059e6b5b)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6632
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

1 files changed, 11 insertions, 10 deletions

diff --git a/src/cpu/samsung/exynos5250/alternate_cbfs.h b/src/cpu/samsung/exynos5250/alternate_cbfs.h
index 8a8727964b..72a30acc84 100644
--- a/src/cpu/samsung/exynos5250/alternate_cbfs.h
+++ b/src/cpu/samsung/exynos5250/alternate_cbfs.h
@@ -21,14 +21,14 @@
 #define CPU_SAMSUNG_EXYNOS5250_ALTERNATE_CBFS_H
 
 /* These are pointers to function pointers. Double indirection! */
-void * * const irom_sdmmc_read_blocks_ptr = (void * *)0x02020030;
-void * * const irom_msh_read_from_fifo_emmc_ptr = (void * *)0x02020044;
-void * * const irom_msh_end_boot_op_emmc_ptr = (void * *)0x02020048;
-void * * const irom_spi_sf_read_ptr = (void * *)0x02020058;
-void * * const irom_load_image_from_usb_ptr = (void * *)0x02020070;
+static void * * const irom_sdmmc_read_blocks_ptr = (void * *)0x02020030;
+static void * * const irom_msh_read_from_fifo_emmc_ptr = (void * *)0x02020044;
+static void * * const irom_msh_end_boot_op_emmc_ptr = (void * *)0x02020048;
+static void * * const irom_spi_sf_read_ptr = (void * *)0x02020058;
+static void * * const irom_load_image_from_usb_ptr = (void * *)0x02020070;
 
 #define SECONDARY_BASE_BOOT_USB 0xfeed0002
-u32 * const iram_secondary_base = (u32 *)0x02020018;
+static u32 * const iram_secondary_base = (u32 *)0x02020018;
 
 /* Values pulled from U-Boot, I think the manual is wrong here (for SPI) */
 #define OM_STAT_SDMMC 0x4
@@ -38,13 +38,14 @@ u32 * const iram_secondary_base = (u32 *)0x02020018;
 
 #if defined(__BOOT_BLOCK__)
 	/* A small space in IRAM to hold the romstage-only image */
-	void * const alternate_cbfs_buffer = (void *)CONFIG_CBFS_CACHE_ADDRESS;
-	size_t const alternate_cbfs_size = CONFIG_CBFS_CACHE_SIZE;
+	static void * const alternate_cbfs_buffer =
+			(void *)CONFIG_CBFS_CACHE_ADDRESS;
+	static size_t const alternate_cbfs_size = CONFIG_CBFS_CACHE_SIZE;
 #else
 	/* Just put this anywhere in RAM that's far enough from anything else */
 	/* TODO: Find a better way to "reserve" this region? */
-	void * const alternate_cbfs_buffer = (void *)0x77400000;
-	size_t const alternate_cbfs_size = 0xc00000;
+	static void * const alternate_cbfs_buffer = (void *)0x77400000;
+	static size_t const alternate_cbfs_size = 0xc00000;
 #endif
 
 #endif