diff options
| author | Julius Werner <jwerner@chromium.org> | 2013-08-29 14:17:36 -0700 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-14 01:43:11 +0200 |
| commit | fa938c7508627c0dfcf03960957ef8631fc53f02 (patch) | |
| tree | 369a6f41d6a4a152ec933b08e869d6bb527adac4 /src/cpu/samsung/exynos5250/clk.h | |
| parent | 755615a12310469b34fc4804bcf2622eb587949c (diff) | |
| download | coreboot-fa938c7508627c0dfcf03960957ef8631fc53f02.tar.xz | |
exynos5: Refactor crazy old U-Boot base address macros away
All this samsung_get_base_address_of_device_with_a_really_long_name()
boilerplate makes my eyes bleed... I think there are so much cleaner
ways to do this. Unfortunately changing this ends up touching nearly
every Exynos5 file, but I hope you agree that it's worth it (and the
sooner we get it over with, the better... I can't bring myself to make
another device fit into that ugly scheme).
This also removes the redundant EXYNOS5 base address definitions from
the 5420 directory when there are EXYNOS5420 ones, to avoid complete
confusion. The new scheme tries to use EXYNOS5 for base addresses and
exynos5 for types that are common between the two processors, and
EXYNOS5420/exynos5420 for things that have changes (although I probably
didn't catch all differences).
Change-Id: I87e58434490ed55a9bbe743af1f9bf2520dec13f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167579
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit 66c87693352c248eec029c1ce83fb295059e6b5b)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6632
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/samsung/exynos5250/clk.h')
| -rw-r--r-- | src/cpu/samsung/exynos5250/clk.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 565cf2b255..f09ac41643 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -23,6 +23,8 @@ #include <stdint.h> +#include "cpu.h" + enum periph_id; #define APLL 0 @@ -67,8 +69,6 @@ unsigned long clock_get_periph_rate(enum periph_id peripheral); #include "pinmux.h" -#define MCT_ADDRESS 0x101c0000 - #define MCT_HZ 24000000 /* @@ -462,7 +462,9 @@ struct exynos5_clock { unsigned char res109b[0xf5e4]; }; -struct exynos5_mct_regs { +static struct exynos5_clock * const exynos_clock = (void *)EXYNOS5_CLOCK_BASE; + +struct exynos5_mct { uint32_t mct_cfg; uint8_t reserved0[0xfc]; uint32_t g_cnt_l; @@ -520,6 +522,9 @@ struct exynos5_mct_regs { uint32_t l1_wstat; }; +static struct exynos5_mct * const exynos_mct = + (void *)EXYNOS5_MULTI_CORE_TIMER_BASE; + #define EXYNOS5_EPLLCON0_LOCKED_SHIFT 29 /* EPLL Locked bit position*/ #define EPLL_SRC_CLOCK 24000000 /*24 MHz Crystal Input */ #define TIMEOUT_EPLL_LOCK 1000 |