diff options
author | Julius Werner <jwerner@chromium.org> | 2013-08-29 14:17:36 -0700 |
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committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-14 01:43:11 +0200 |
commit | fa938c7508627c0dfcf03960957ef8631fc53f02 (patch) | |
tree | 369a6f41d6a4a152ec933b08e869d6bb527adac4 /src/cpu/samsung/exynos5250/fb.c | |
parent | 755615a12310469b34fc4804bcf2622eb587949c (diff) | |
download | coreboot-fa938c7508627c0dfcf03960957ef8631fc53f02.tar.xz |
exynos5: Refactor crazy old U-Boot base address macros away
All this samsung_get_base_address_of_device_with_a_really_long_name()
boilerplate makes my eyes bleed... I think there are so much cleaner
ways to do this. Unfortunately changing this ends up touching nearly
every Exynos5 file, but I hope you agree that it's worth it (and the
sooner we get it over with, the better... I can't bring myself to make
another device fit into that ugly scheme).
This also removes the redundant EXYNOS5 base address definitions from
the 5420 directory when there are EXYNOS5420 ones, to avoid complete
confusion. The new scheme tries to use EXYNOS5 for base addresses and
exynos5 for types that are common between the two processors, and
EXYNOS5420/exynos5420 for things that have changes (although I probably
didn't catch all differences).
Change-Id: I87e58434490ed55a9bbe743af1f9bf2520dec13f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167579
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit 66c87693352c248eec029c1ce83fb295059e6b5b)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6632
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/samsung/exynos5250/fb.c')
-rw-r--r-- | src/cpu/samsung/exynos5250/fb.c | 51 |
1 files changed, 21 insertions, 30 deletions
diff --git a/src/cpu/samsung/exynos5250/fb.c b/src/cpu/samsung/exynos5250/fb.c index 3724a247c6..080be49250 100644 --- a/src/cpu/samsung/exynos5250/fb.c +++ b/src/cpu/samsung/exynos5250/fb.c @@ -20,22 +20,19 @@ /* LCD driver for Exynos */ -#include <arch/io.h> +#include <delay.h> #include <stdlib.h> #include <string.h> #include <timer.h> -#include <delay.h> +#include <arch/io.h> #include <console/console.h> -#include "cpu.h" #include "power.h" #include "sysreg.h" -#include <drivers/maxim/max77686/max77686.h> -#include "device/i2c.h" -#include "i2c.h" -#include "fimd.h" #include "dp.h" #include "dp-core.h" +#include "fimd.h" +#include "i2c.h" /* * Here is the rough outline of how we bring up the display: @@ -109,10 +106,8 @@ short console_row; /* Bypass FIMD of DISP1_BLK */ static void fimd_bypass(void) { - struct exynos5_sysreg *sysreg = samsung_get_base_sysreg(); - - setbits_le32(&sysreg->disp1blk_cfg, FIMDBYPASS_DISP1); - sysreg->disp1blk_cfg &= ~FIMDBYPASS_DISP1; + setbits_le32(&exynos_sysreg->disp1blk_cfg, FIMDBYPASS_DISP1); + exynos_sysreg->disp1blk_cfg &= ~FIMDBYPASS_DISP1; } /* @@ -125,56 +120,52 @@ void fb_init(unsigned long int fb_size, void *lcdbase, struct exynos5_fimd_panel *pd) { unsigned int val; - struct exynos5_fimd *fimd = samsung_get_base_fimd(); - struct exynos5_disp_ctrl *disp_ctrl = samsung_get_base_disp_ctrl(); fb_size = ALIGN(fb_size, 4096); - writel(pd->ivclk | pd->fixvclk, &disp_ctrl->vidcon1); + writel(pd->ivclk | pd->fixvclk, &exynos_disp_ctrl->vidcon1); val = ENVID_ON | ENVID_F_ON | (pd->clkval_f << CLKVAL_F_OFFSET); - writel(val, &fimd->vidcon0); + writel(val, &exynos_fimd->vidcon0); val = (pd->vsync << VSYNC_PULSE_WIDTH_OFFSET) | (pd->lower_margin << V_FRONT_PORCH_OFFSET) | (pd->upper_margin << V_BACK_PORCH_OFFSET); - writel(val, &disp_ctrl->vidtcon0); + writel(val, &exynos_disp_ctrl->vidtcon0); val = (pd->hsync << HSYNC_PULSE_WIDTH_OFFSET) | (pd->right_margin << H_FRONT_PORCH_OFFSET) | (pd->left_margin << H_BACK_PORCH_OFFSET); - writel(val, &disp_ctrl->vidtcon1); + writel(val, &exynos_disp_ctrl->vidtcon1); val = ((pd->xres - 1) << HOZVAL_OFFSET) | ((pd->yres - 1) << LINEVAL_OFFSET); - writel(val, &disp_ctrl->vidtcon2); + writel(val, &exynos_disp_ctrl->vidtcon2); - writel((unsigned int)lcdbase, &fimd->vidw00add0b0); - writel((unsigned int)lcdbase + fb_size, &fimd->vidw00add1b0); + writel((unsigned int)lcdbase, &exynos_fimd->vidw00add0b0); + writel((unsigned int)lcdbase + fb_size, &exynos_fimd->vidw00add1b0); - writel(pd->xres * 2, &fimd->vidw00add2); + writel(pd->xres * 2, &exynos_fimd->vidw00add2); val = ((pd->xres - 1) << OSD_RIGHTBOTX_F_OFFSET); val |= ((pd->yres - 1) << OSD_RIGHTBOTY_F_OFFSET); - writel(val, &fimd->vidosd0b); - writel(pd->xres * pd->yres, &fimd->vidosd0c); + writel(val, &exynos_fimd->vidosd0b); + writel(pd->xres * pd->yres, &exynos_fimd->vidosd0c); - setbits_le32(&fimd->shadowcon, CHANNEL0_EN); + setbits_le32(&exynos_fimd->shadowcon, CHANNEL0_EN); val = BPPMODE_F_RGB_16BIT_565 << BPPMODE_F_OFFSET; val |= ENWIN_F_ENABLE | HALF_WORD_SWAP_EN; - writel(val, &fimd->wincon0); + writel(val, &exynos_fimd->wincon0); /* DPCLKCON_ENABLE */ - writel(1 << 1, &fimd->dpclkcon); + writel(1 << 1, &exynos_fimd->dpclkcon); } #ifdef UNUSED_CODE void exynos_fimd_disable(void) { - struct exynos5_fimd *fimd = samsung_get_base_fimd(); - - writel(0, &fimd->wincon0); - clrbits_le32(&fimd->shadowcon, CHANNEL0_EN); + writel(0, &exynos_fimd->wincon0); + clrbits_le32(&exynos_fimd->shadowcon, CHANNEL0_EN); } #endif |