diff options
| author | David Hendricks <dhendrix@chromium.org> | 2013-08-20 17:13:01 -0700 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-12 22:01:48 +0200 |
| commit | 2f3daddd28c95a134f2543e366f8ee9dd8d2be41 (patch) | |
| tree | e36577aa89aa17d9418914988142faf19797322c /src/cpu/samsung/exynos5420/bootblock.c | |
| parent | ad4556f2cb429d921a9e00e3937797ea6f6f4cd8 (diff) | |
| download | coreboot-2f3daddd28c95a134f2543e366f8ee9dd8d2be41.tar.xz | |
exynos5420: Alter init sequence as per recommendation
As per hardware recommendation, CKE PAD retention release must
happen just before gate leveling enable and only in case of resume.
Hence, this patch moves pad retention release from dmc_common.c to
dmc_init_ddr3_exynos5420.c. In addition to this we are providing
125 (+3 extra being safe) times auto refresh to DRAM by sending
REFA direct command. This is required because when CKE PAD retention
release happens, self refresh mode of DDR3 is disabled.
Hence, auto refresh 125 times.
This is ported from https://gerrit.chromium.org/gerrit/#/c/65573
Note: Since WAKEUP_DIRECT does not go thru memory init, it should be
safe to move CKE PAD retention out of bootblock.c.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Idec5d6fbbe3c6344d47401ba7203079c52a9b866
Reviewed-on: https://gerrit.chromium.org/gerrit/66788
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
(cherry picked from commit 96cbcb09245d4df92d3e1998704ab440be42df25)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6604
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu/samsung/exynos5420/bootblock.c')
| -rw-r--r-- | src/cpu/samsung/exynos5420/bootblock.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/src/cpu/samsung/exynos5420/bootblock.c b/src/cpu/samsung/exynos5420/bootblock.c index 1ad75ef493..2c42b03ce7 100644 --- a/src/cpu/samsung/exynos5420/bootblock.c +++ b/src/cpu/samsung/exynos5420/bootblock.c @@ -31,23 +31,6 @@ void bootblock_cpu_init(void); void bootblock_cpu_init(void) { - u32 ret; - /* - * During Suspend-Resume & S/W-Reset, as soon as PMU releases - * pad retention, CKE goes high. This causes memory contents - * not to be retained during DRAM initialization. Therfore, - * there is a new control register(0x100431e8[28]) which lets us - * release pad retention and retain the memory content until the - * initialization is complete. - */ - if (read32(((void *)INF_REG_BASE + INF_REG1_OFFSET)) == S5P_CHECK_SLEEP) { - write32(PAD_RETENTION_DRAM_COREBLK_VAL, - (void *)PAD_RETENTION_DRAM_COREBLK_OPTION); - do { - ret = read32((void *)PAD_RETENTION_DRAM_STATUS); - } while (ret != 0x1); - } - /* kick off the multi-core timer. * We want to do this as early as we can. */ |