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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2013-07-08 14:26:35 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-12-12 22:05:41 +0100 |
| commit | 865912cec083afba64f9ada0a438da8a10daea78 (patch) | |
| tree | 393e05fc7cc99783cea2f2aac3da7e7c7376008f /src/cpu/samsung/exynos5420/clock.c | |
| parent | aa1b10617d3a06c37e8294aa45dbb8bea5857651 (diff) | |
| download | coreboot-865912cec083afba64f9ada0a438da8a10daea78.tar.xz | |
peppy: Add backward-compatible RAM_ID table.
Make use of google_chromeec_get_board_version to determine board
version, and apply proper RAM_ID table to load correct SPD.
Change-Id: I6a2d54759cf2ce98bf53df0db396c6e09368c714
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61192
Reviewed-by: Dave Parker <dparker@chromium.org>
Reviewed-on: http://review.coreboot.org/4353
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/samsung/exynos5420/clock.c')
0 files changed, 0 insertions, 0 deletions