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| author | Ronald G. Minnich <rminnich@google.com> | 2013-08-01 11:38:05 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 22:45:06 +0100 |
| commit | c0d5eb2a332a7db1311517032e6f9ce1d5b91551 (patch) | |
| tree | ce25ec78b413e91d3e16fd7b12bffa408cb20f4e /src/cpu/samsung/exynos5420/cpu.c | |
| parent | 052bf4ba2108ecc354c08f64dc57290c9509fd22 (diff) | |
| download | coreboot-c0d5eb2a332a7db1311517032e6f9ce1d5b91551.tar.xz | |
Pit: graphics
This includes the new dp code, which is better, and the fimd code,
which is changed and improved. We took the chance to remove un-needed
files, and also to remove some foolish u-boot habits, but not all of
them. That will take time.
With these changes we get graphics.
Since the only mainboards we have with 16 bit graphics are 5:6:5,
adjust edid.c to just use that format. If at some future time we need
4:4:4, which seems unlikely, we'll need to add a function to adjust
the lb_framebuffer. Note that you can't just divine this from the EDID,
as the graphics pipe format need not match the actual final format used.
The EDID reading works. We've been requested to support hard-coded
EDIDs and that will come in the next revision. Currently the hard-coded
EDID is ignored for testing.
Change-Id: Ib4d06dc3388ab90c834f94808a51133e5b515a4d
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/64240
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4432
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu/samsung/exynos5420/cpu.c')
| -rw-r--r-- | src/cpu/samsung/exynos5420/cpu.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/samsung/exynos5420/cpu.c b/src/cpu/samsung/exynos5420/cpu.c index e95b438216..729e6b3707 100644 --- a/src/cpu/samsung/exynos5420/cpu.c +++ b/src/cpu/samsung/exynos5420/cpu.c @@ -26,8 +26,8 @@ #include <device/device.h> #include <cbmem.h> #include <arch/cache.h> +#include "dp.h" #include "fimd.h" -#include "dp-core.h" #include "cpu.h" #include "clk.h" #include "usb.h" @@ -138,9 +138,7 @@ static void exynos_displayport_init(device_t dev, u32 lcdbase, dcache_clean_invalidate_by_mva(lower, upper - lower); mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF); - printk(BIOS_DEBUG, "Initializing Exynos LCD.\n"); - - lcd_ctrl_init(fb_size, &panel, (void *)lcdbase); + mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB); } static void cpu_enable(device_t dev) |