exynos5: Refactor crazy old U-Boot base address macros away

All this samsung_get_base_address_of_device_with_a_really_long_name()
boilerplate makes my eyes bleed... I think there are so much cleaner
ways to do this. Unfortunately changing this ends up touching nearly
every Exynos5 file, but I hope you agree that it's worth it (and the
sooner we get it over with, the better... I can't bring myself to make
another device fit into that ugly scheme).

This also removes the redundant EXYNOS5 base address definitions from
the 5420 directory when there are EXYNOS5420 ones, to avoid complete
confusion. The new scheme tries to use EXYNOS5 for base addresses and
exynos5 for types that are common between the two processors, and
EXYNOS5420/exynos5420 for things that have changes (although I probably
didn't catch all differences).

Change-Id: I87e58434490ed55a9bbe743af1f9bf2520dec13f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167579
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit 66c87693352c248eec029c1ce83fb295059e6b5b)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6632
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

1 files changed, 6 insertions, 65 deletions

diff --git a/src/cpu/samsung/exynos5420/mct.c b/src/cpu/samsung/exynos5420/mct.c
index 4c5cdd1b20..b02fc6d9fa 100644
--- a/src/cpu/samsung/exynos5420/mct.c
+++ b/src/cpu/samsung/exynos5420/mct.c
@@ -21,84 +21,25 @@
 #include <arch/io.h>
 #include "clk.h"
 
-struct __attribute__((packed)) mct_regs
-{
-	uint32_t mct_cfg;
-	uint8_t reserved0[0xfc];
-	uint32_t g_cnt_l;
-	uint32_t g_cnt_u;
-	uint8_t reserved1[0x8];
-	uint32_t g_cnt_wstat;
-	uint8_t reserved2[0xec];
-	uint32_t g_comp0_l;
-	uint32_t g_comp0_u;
-	uint32_t g_comp0_addr_incr;
-	uint8_t reserved3[0x4];
-	uint32_t g_comp1_l;
-	uint32_t g_comp1_u;
-	uint32_t g_comp1_addr_incr;
-	uint8_t reserved4[0x4];
-	uint32_t g_comp2_l;
-	uint32_t g_comp2_u;
-	uint32_t g_comp2_addr_incr;
-	uint8_t reserved5[0x4];
-	uint32_t g_comp3_l;
-	uint32_t g_comp3_u;
-	uint32_t g_comp3_addr_incr;
-	uint8_t reserved6[0x4];
-	uint32_t g_tcon;
-	uint32_t g_int_cstat;
-	uint32_t g_int_enb;
-	uint32_t g_wstat;
-	uint8_t reserved7[0xb0];
-	uint32_t l0_tcntb;
-	uint32_t l0_tcnto;
-	uint32_t l0_icntb;
-	uint32_t l0_icnto;
-	uint32_t l0_frcntb;
-	uint32_t l0_frcnto;
-	uint8_t reserved8[0x8];
-	uint32_t l0_tcon;
-	uint8_t reserved9[0xc];
-	uint32_t l0_int_cstat;
-	uint32_t l0_int_enb;
-	uint8_t reserved10[0x8];
-	uint32_t l0_wstat;
-	uint8_t reserved11[0xbc];
-	uint32_t l1_tcntb;
-	uint32_t l1_tcnto;
-	uint32_t l1_icntb;
-	uint32_t l1_icnto;
-	uint32_t l1_frcntb;
-	uint32_t l1_frcnto;
-	uint8_t reserved12[0x8];
-	uint32_t l1_tcon;
-	uint8_t reserved13[0xc];
-	uint32_t l1_int_cstat;
-	uint32_t l1_int_enb;
-	uint8_t reserved14[0x8];
-	uint32_t l1_wstat;
-};
-
 static int enabled = 0;
-static struct mct_regs *const mct =
-	(struct mct_regs *)MCT_ADDRESS;
 
 uint64_t mct_raw_value(void)
 {
 	if (!enabled) {
-		writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon);
+		writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
+			&exynos_mct->g_tcon);
 		enabled = 1;
 	}
 
-	uint64_t upper = readl(&mct->g_cnt_u);
-	uint64_t lower = readl(&mct->g_cnt_l);
+	uint64_t upper = readl(&exynos_mct->g_cnt_u);
+	uint64_t lower = readl(&exynos_mct->g_cnt_l);
 
 	return (upper << 32) | lower;
 }
 
 void mct_start(void)
 {
-	writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon);
+	writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
+		&exynos_mct->g_tcon);
 	enabled = 1;
 }