Exynos 5420: Enable dynamic CBMEM

...  In order to do this, the graphics memory has to move into
the resource allocator and out of CBMEM.

Change-Id: I565c3d6dea747822fbabf6f3845232d4adfbf333
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63657
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4391
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

5 files changed, 54 insertions, 19 deletions

diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig
index 4f102d1b26..df721ae0c1 100644
--- a/src/cpu/samsung/exynos5420/Kconfig
+++ b/src/cpu/samsung/exynos5420/Kconfig
@@ -3,6 +3,7 @@ config CPU_SAMSUNG_EXYNOS5420
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_UART_SPECIAL
 	select EARLY_CONSOLE
+	select DYNAMIC_CBMEM
 	bool
 	default n
 
diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc
index b92a23f558..704a346209 100644
--- a/src/cpu/samsung/exynos5420/Makefile.inc
+++ b/src/cpu/samsung/exynos5420/Makefile.inc
@@ -33,6 +33,7 @@ romstage-y += gpio.c
 romstage-y += timer.c
 romstage-y += i2c.c
 #romstage-y += wdt.c
+romstage-y += cbmem.c
 
 ramstage-y += spi.c
 ramstage-y += clock.c
@@ -50,6 +51,7 @@ ramstage-y += i2c.c
 ramstage-y += dp-reg.c
 ramstage-y += fb.c
 ramstage-y += usb.c
+ramstage-y += cbmem.c
 
 exynos5420_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5420 BL1\n"
diff --git a/src/cpu/samsung/exynos5420/cbmem.c b/src/cpu/samsung/exynos5420/cbmem.c
new file mode 100644
index 0000000000..e77af99ffc
--- /dev/null
+++ b/src/cpu/samsung/exynos5420/cbmem.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stddef.h>
+#include <cbmem.h>
+#include "cpu.h"
+
+void *cbmem_top(void)
+{
+	return (void *)(get_fb_base_kb() * KiB);
+}
+
diff --git a/src/cpu/samsung/exynos5420/cpu.c b/src/cpu/samsung/exynos5420/cpu.c
index 744f7ae0c7..27fa08d5aa 100644
--- a/src/cpu/samsung/exynos5420/cpu.c
+++ b/src/cpu/samsung/exynos5420/cpu.c
@@ -32,9 +32,6 @@
 #include "usb.h"
 #include "chip.h"
 
-#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10)
-#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL)
-
 static unsigned int cpu_id;
 static unsigned int cpu_rev;
 
@@ -62,16 +59,14 @@ static void set_cpu_id(void)
  * involving lots of machine and callbacks, is hard to debug and
  * verify.
  */
-static void exynos_displayport_init(device_t dev)
+static void exynos_displayport_init(device_t dev, u32 lcdbase,
+		unsigned long fb_size)
 {
 	struct cpu_samsung_exynos5420_config *conf = dev->chip_info;
 	/* put these on the stack. If, at some point, we want to move
 	 * this code to a pre-ram stage, it will be much easier.
 	 */
 	struct exynos5_fimd_panel panel;
-	unsigned long int fb_size;
-	u32 lcdbase;
-
 	memset(&panel, 0, sizeof(panel));
 
 	panel.is_dp = 1; /* Display I/F is eDP */
@@ -92,11 +87,7 @@ static void exynos_displayport_init(device_t dev)
 	panel.xres = conf->xres;
 	panel.yres = conf->yres;
 
-	/* The size is a magic number from hardware. */
-	fb_size = conf->xres * conf->yres * (conf->bpp / 8);
-	lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size);
-	printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase));
-
+	printk(BIOS_SPEW, "LCD framebuffer @%p\n", (void *)(lcdbase));
 	memset((void *)lcdbase, 0, fb_size);	/* clear the framebuffer */
 
 	/*
@@ -110,23 +101,26 @@ static void exynos_displayport_init(device_t dev)
 	 */
 	uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
 	uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
+
 	dcache_clean_invalidate_by_mva(lower, upper - lower);
-	mmu_config_range(lower/MiB, (upper - lower)/MiB, DCACHE_OFF);
+	mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF);
+
+	printk(BIOS_DEBUG, "Initializing Exynos LCD.\n");
 
-	mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
-	printk(BIOS_DEBUG,
-	       "Initializing Exynos VGA, base %p\n", (void *)lcdbase);
 	lcd_ctrl_init(fb_size, &panel, (void *)lcdbase);
 }
 
 static void cpu_enable(device_t dev)
 {
-	exynos_displayport_init(dev);
+	unsigned long fb_size = FB_SIZE_KB * KiB;
+	u32 lcdbase = get_fb_base_kb() * KiB;
 
-	ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB);
+	ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB - FB_SIZE_KB);
+	mmio_resource(dev, 1, lcdbase / KiB, (fb_size + KiB - 1) / KiB);
 
-	set_cpu_id();
+	exynos_displayport_init(dev, lcdbase, fb_size);
 
+	set_cpu_id();
 }
 
 static void cpu_init(device_t dev)
diff --git a/src/cpu/samsung/exynos5420/cpu.h b/src/cpu/samsung/exynos5420/cpu.h
index 0d588da5f3..8913120d1d 100644
--- a/src/cpu/samsung/exynos5420/cpu.h
+++ b/src/cpu/samsung/exynos5420/cpu.h
@@ -202,4 +202,14 @@ void exynos5420_config_l2_cache(void);
 
 extern struct tmu_info exynos5420_tmu_info;
 
+/* TODO clean up defines. */
+#define FB_SIZE_KB  4096
+#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10)
+#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL)
+
+static inline u32 get_fb_base_kb(void)
+{
+	return RAM_BASE_KB + RAM_SIZE_KB - FB_SIZE_KB;
+}
+
 #endif	/* _EXYNOS5420_CPU_H */