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| author | Hung-Te Lin <hungte@chromium.org> | 2013-06-26 19:52:52 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 23:16:10 +0200 |
| commit | 16cb01044010b4bd1bacad3160aebf91ebd86681 (patch) | |
| tree | 78209d75a973d8bb185752683e56b248b0ea486c /src/cpu/samsung | |
| parent | 0ee7062e305c6ba4457e1edf10de8d5b3b388a70 (diff) | |
| download | coreboot-16cb01044010b4bd1bacad3160aebf91ebd86681.tar.xz | |
armv7/exynos5420: Revise SPI device list in cpu.h
Add SPI0 and SPI2 to Exynos 5 SPI list, and correct structure names.
Also removed the un-enumerated devices (SPI_BASE, base_spi()).
Change-Id: Ica6d9a41f9619c8c61eab664d5e988dd4a428e09
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3708
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/samsung')
| -rw-r--r-- | src/cpu/samsung/exynos5420/cpu.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/cpu/samsung/exynos5420/cpu.h b/src/cpu/samsung/exynos5420/cpu.h index 7d0a5d56f0..251abeae1f 100644 --- a/src/cpu/samsung/exynos5420/cpu.h +++ b/src/cpu/samsung/exynos5420/cpu.h @@ -66,9 +66,10 @@ #define EXYNOS5_SROMC_BASE 0x12250000 #define EXYNOS5_UART_BASE 0x12C00000 +#define EXYNOS5_SPI0_BASE 0x12D20000 #define EXYNOS5_SPI1_BASE 0x12D30000 +#define EXYNOS5_SPI2_BASE 0x12D40000 #define EXYNOS5_I2C_BASE 0x12C60000 -#define EXYNOS5_SPI_BASE 0x12D20000 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000 #define EXYNOS5_SPI_ISP_BASE 0x131A0000 #define EXYNOS5_I2S_BASE 0x12D60000 @@ -191,9 +192,10 @@ #define samsung_get_base_watchdog() ((struct exynos5_watchdog *)EXYNOS5_WATCHDOG_BASE) #define samsung_get_base_power() ((struct exynos5_power *)EXYNOS5_POWER_BASE) #define samsung_get_base_i2s() ((struct exynos5_i2s *)EXYNOS5_I2S_BASE) -#define samsung_get_base_spi1() ((struct exynos5_spi1 *)EXYNOS5_SPI1_BASE) +#define samsung_get_base_spi0() ((struct exynos_spi *)EXYNOS5_SPI0_BASE) +#define samsung_get_base_spi1() ((struct exynos_spi *)EXYNOS5_SPI1_BASE) +#define samsung_get_base_spi2() ((struct exynos_spi *)EXYNOS5_SPI2_BASE) #define samsung_get_base_i2c() ((struct exynos5_i2c *)EXYNOS5_I2C_BASE) -#define samsung_get_base_spi() ((struct exynos5_spi *)EXYNOS5_SPI_BASE) #define samsung_get_base_spi_isp() ((struct exynos5_spi_isp *)EXYNOS5_SPI_ISP_BASE) #define EXYNOS5_SPI_NUM_CONTROLLERS 5 |