diff options
author | Gabe Black <gabeblack@chromium.org> | 2013-05-26 07:15:57 -0700 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-26 18:19:36 +0200 |
commit | 3c7e939c3e18b3d286c084ff95266611a0150ca1 (patch) | |
tree | c0faeb8d641c435768755d3e2fda3743ee681ab3 /src/cpu/ti/am335x/bootblock.c | |
parent | b460a66aa96a42349ebbd2e6e8d450787437e0e3 (diff) | |
download | coreboot-3c7e939c3e18b3d286c084ff95266611a0150ca1.tar.xz |
beaglebone: initial Kconfig and Makefiles
Initial structure of Beaglebone port
Change-Id: Ia255ab207f424dcd525990cdc0d74953e012c087
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3279
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/ti/am335x/bootblock.c')
-rw-r--r-- | src/cpu/ti/am335x/bootblock.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/cpu/ti/am335x/bootblock.c b/src/cpu/ti/am335x/bootblock.c new file mode 100644 index 0000000000..e9434a1fae --- /dev/null +++ b/src/cpu/ti/am335x/bootblock.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> + +#include <arch/cache.h> + +void bootblock_cpu_init(void); +void bootblock_cpu_init(void) +{ + uint32_t sctlr; + + /* enable dcache */ + sctlr = read_sctlr(); + sctlr |= SCTLR_C; + write_sctlr(sctlr); +} |