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| author | Aaron Durbin <adurbin@chromium.org> | 2015-09-07 23:05:28 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-09 19:34:31 +0000 |
| commit | 4b34909d099e395161b90c5528382450dc9937fc (patch) | |
| tree | 743818c34b6445e9f68d32075f01b65c7b092f5e /src/cpu/ti | |
| parent | cd96c5cf95e68280f0ff19831555930bbb705dca (diff) | |
| download | coreboot-4b34909d099e395161b90c5528382450dc9937fc.tar.xz | |
x86: provide minimum alignment for romstage
The current way the XIP address of romstage is calculated is by
doing a 'cbfstool locate' using a bin file of romstage linked
at address 0. That address is then used for re-linking romstage at
the address spit out by cbfstool. Currently, the linker actually
sets minimum alignment on the text sections as 32 bytes, but it
doesn't actually honor that value. Instead, provide a minimum
alignment for romstage so as not to fight the linker.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built asus/kfsn4-dre. Confirmed ROMSTAGE_BASE == gdtptr.
Change-Id: Id6ec65d257df9ede78c720b0d7d4b56acfbb3f15
Signed-off-by: Aaron Durbin <adubin@chromium.org>
Reviewed-on: http://review.coreboot.org/11588
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/ti')
0 files changed, 0 insertions, 0 deletions