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authorJulius Werner <jwerner@chromium.org>2014-08-20 15:29:56 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-06 22:05:01 +0200
commitec5e5e0db2ac923a4f80d24ffa7582c3b821d971 (patch)
treea9d8c7d6a0fab0cc2c41c9de4ec39f355289a72b /src/cpu/ti
parent06ef04604570d402687245521731053c66888b15 (diff)
downloadcoreboot-ec5e5e0db2ac923a4f80d24ffa7582c3b821d971.tar.xz
New mechanism to define SRAM/memory map with automatic bounds checking
This patch creates a new mechanism to define the static memory layout (primarily in SRAM) for a given board, superseding the brittle mass of Kconfigs that we were using before. The core part is a memlayout.ld file in the mainboard directory (although boards are expected to just include the SoC default in most cases), which is the primary linker script for all stages (though not rmodules for now). It uses preprocessor macros from <memlayout.h> to form a different valid linker script for all stages while looking like a declarative, boilerplate-free map of memory addresses to the programmer. Linker asserts will automatically guarantee that the defined regions cannot overlap. Stages are defined with a maximum size that will be enforced by the linker. The file serves to both define and document the memory layout, so that the documentation cannot go missing or out of date. The mechanism is implemented for all boards in the ARM, ARM64 and MIPS architectures, and should be extended onto all systems using SRAM in the future. The CAR/XIP environment on x86 has very different requirements and the layout is generally not as static, so it will stay like it is and be unaffected by this patch (save for aligning some symbol names for consistency and sharing the new common ramstage linker script include). BUG=None TEST=Booted normally and in recovery mode, checked suspend/resume and the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies with ToT and looked for red flags. Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614 Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/213370 Reviewed-on: http://review.coreboot.org/9283 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/cpu/ti')
-rw-r--r--src/cpu/ti/am335x/Kconfig32
-rw-r--r--src/cpu/ti/am335x/Makefile.inc10
-rw-r--r--src/cpu/ti/am335x/bootblock_media.c6
-rw-r--r--src/cpu/ti/am335x/cbmem.c3
-rw-r--r--src/cpu/ti/am335x/header.c3
-rw-r--r--src/cpu/ti/am335x/header.ld13
-rw-r--r--src/cpu/ti/am335x/memlayout.ld42
7 files changed, 59 insertions, 50 deletions
diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
index b2c692b9e9..c0554b8df1 100644
--- a/src/cpu/ti/am335x/Kconfig
+++ b/src/cpu/ti/am335x/Kconfig
@@ -12,46 +12,14 @@ config CPU_TI_AM335X
if CPU_TI_AM335X
-config BOOTBLOCK_BASE
- hex
- default 0x402f0400
-
config CBFS_ROM_OFFSET
# Calculated by BL1 + max bootblock size.
default 0x4c00
-# We need to leave a gap between the bootblock and the ROM stage so that when
-# it is "loaded" to a slightly different place in on chip memory, it doesn't
-# clobber the metadata needed to actually enter it.
-config ROMSTAGE_BASE
- hex
- default 0x402f5400
-
-# Stack may reside in either IRAM or DRAM. We will define it to live
-# at the top of IRAM for now.
-#
-# Stack grows downward, push operation stores register contents in
-# consecutive memory locations ending just below SP
-config STACK_TOP
- hex
- default 0x4030ce00
-
-config STACK_BOTTOM
- hex
- default 0x4030be00
-
-config STACK_SIZE
- hex
- default 0x1000
-
## TODO Change this to some better address not overlapping bootblock when
## cbfstool supports creating header in arbitrary location.
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x40
-config SYS_SDRAM_BASE
- hex
- default 0x40000000
-
endif
diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc
index 45188ce4a6..1dbadae924 100644
--- a/src/cpu/ti/am335x/Makefile.inc
+++ b/src/cpu/ti/am335x/Makefile.inc
@@ -23,14 +23,14 @@ $(eval $(call create_class_compiler,omap-header,arm))
real-target: $(obj)/MLO
-header_ld = $(src)/cpu/ti/am335x/header.ld
+header_ld = $(obj)/cpu/ti/am335x/header.omap-header.ld
get_header_size= \
$(eval omap_header_info=$(shell $(CBFSTOOL) $(1) print | grep $(2))) \
$(shell echo $$(($(word 2,$(omap_header_info)) + \
$(word 4,$(omap_header_info)))))
-$(obj)/omap-header.bin: $$(omap-header-objs) $$(header_ld) $(obj)/coreboot.rom
+$(obj)/omap-header.bin: $$(omap-header-objs) $(obj)/coreboot.rom
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC_omap-header) -nostdlib -nostartfiles -static -include $(obj)/config.h \
-Wl,--defsym,header_load_size=$(strip \
@@ -46,3 +46,9 @@ $(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin
$(Q)cat $(obj)/omap-header.bin $(obj)/coreboot.rom > $@
omap-header-y += header.c
+
+bootblock-y += memlayout.ld
+romstage-y += memlayout.ld
+ramstage-y += memlayout.ld
+omap-header-y += memlayout.ld
+omap-header-y += header.ld
diff --git a/src/cpu/ti/am335x/bootblock_media.c b/src/cpu/ti/am335x/bootblock_media.c
index 553fe42e4d..93a2d185e8 100644
--- a/src/cpu/ti/am335x/bootblock_media.c
+++ b/src/cpu/ti/am335x/bootblock_media.c
@@ -20,6 +20,7 @@
#include <cbfs.h>
#include <console/console.h>
#include <string.h>
+#include <symbols.h>
static int dummy_open(struct cbfs_media *media)
{
@@ -34,7 +35,7 @@ static int dummy_close(struct cbfs_media *media)
static void * on_chip_memory_map(struct cbfs_media *media, size_t offset,
size_t count)
{
- return (void *)((uintptr_t)CONFIG_BOOTBLOCK_BASE + offset);
+ return _dram + offset;
}
static void * dummy_unmap(struct cbfs_media *media, const void *address)
@@ -54,8 +55,7 @@ static size_t on_chip_memory_read(struct cbfs_media *media, void *dest,
int init_default_cbfs_media(struct cbfs_media *media)
{
struct cbfs_header *header =
- (struct cbfs_header *)((uintptr_t)CONFIG_BOOTBLOCK_BASE +
- CONFIG_CBFS_HEADER_ROM_OFFSET);
+ (struct cbfs_header *)(_dram + CONFIG_CBFS_HEADER_ROM_OFFSET);
if (CBFS_HEADER_MAGIC != ntohl(header->magic)) {
printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header);
diff --git a/src/cpu/ti/am335x/cbmem.c b/src/cpu/ti/am335x/cbmem.c
index 84f88cfa83..af662c039c 100644
--- a/src/cpu/ti/am335x/cbmem.c
+++ b/src/cpu/ti/am335x/cbmem.c
@@ -17,8 +17,9 @@
#include <stddef.h>
#include <cbmem.h>
+#include <symbols.h>
void *cbmem_top(void)
{
- return (void *)CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20);
+ return _dram + (CONFIG_DRAM_SIZE_MB << 20);
}
diff --git a/src/cpu/ti/am335x/header.c b/src/cpu/ti/am335x/header.c
index 5ed943edeb..9fa8d68df0 100644
--- a/src/cpu/ti/am335x/header.c
+++ b/src/cpu/ti/am335x/header.c
@@ -20,6 +20,7 @@
#include <config.h>
#include <stddef.h>
#include <stdint.h>
+#include <symbols.h>
#include "header.h"
@@ -70,6 +71,6 @@ struct omap_image_headers headers __attribute__((section(".header"))) = {
},
.image_header = {
.size = (uintptr_t)&header_load_size,
- .destination = CONFIG_BOOTBLOCK_BASE
+ .destination = (uintptr_t)_dram
}
};
diff --git a/src/cpu/ti/am335x/header.ld b/src/cpu/ti/am335x/header.ld
index 33c10e198c..559c497238 100644
--- a/src/cpu/ti/am335x/header.ld
+++ b/src/cpu/ti/am335x/header.ld
@@ -21,14 +21,5 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
-TARGET(binary)
-SECTIONS
-{
- .header : {
- *(.header);
- }
-
- /DISCARD/ : {
- *(*)
- }
-}
+#define OMAP_HEADER 1
+#include "memlayout.ld"
diff --git a/src/cpu/ti/am335x/memlayout.ld b/src/cpu/ti/am335x/memlayout.ld
new file mode 100644
index 0000000000..f87f000524
--- /dev/null
+++ b/src/cpu/ti/am335x/memlayout.ld
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <memlayout.h>
+
+#include <arch/header.ld>
+
+SECTIONS
+{
+ DRAM_START(0x40000000)
+ BOOTBLOCK(0x402f0400, 20K)
+ ROMSTAGE(0x402f5400, 90K)
+ STACK(0x4030be00, 4K)
+ RAMSTAGE(0x80200000, 192K)
+
+#ifdef OMAP_HEADER
+ .header : {
+ *(.header);
+ } : to_load
+
+ /DISCARD/ : {
+ *(*)
+ }
+#endif
+}
+