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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-24 02:02:42 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-31 03:47:04 +0000
commitef3f94a5db9228cc668a61bdd3065cd41da2fc55 (patch)
tree3910d29a65744651e49116cc7701b24a2a1d84d8 /src/cpu/via/c7/Kconfig
parent5ceaf7bf5f3e2a829d84ae3741f9ac1c6bac658b (diff)
downloadcoreboot-ef3f94a5db9228cc668a61bdd3065cd41da2fc55.tar.xz
Remove VIA C7 CPU support
Change-Id: Ib8c943e01ac293bdbf37f43ff72dbb636b46a8af Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26681 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/via/c7/Kconfig')
-rw-r--r--src/cpu/via/c7/Kconfig26
1 files changed, 0 insertions, 26 deletions
diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig
deleted file mode 100644
index b71178dae5..0000000000
--- a/src/cpu/via/c7/Kconfig
+++ /dev/null
@@ -1,26 +0,0 @@
-config CPU_VIA_C7
- bool
-
-if CPU_VIA_C7
-
-config CPU_SPECIFIC_OPTIONS
- def_bool y
- select ARCH_BOOTBLOCK_X86_32
- select ARCH_VERSTAGE_X86_32
- select ARCH_ROMSTAGE_X86_32
- select ARCH_RAMSTAGE_X86_32
- # Missing tsc_freq_mhz and TSC_CONSTANT_RATE
- #select UDELAY_TSC
- select UDELAY_IO
- select MMX
- select SSE2
-
-config DCACHE_RAM_BASE
- hex
- default 0xffef0000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
-
-endif # CPU_VIA_C7