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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-02-24 11:08:53 -0800 |
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committer | Martin Roth <martinroth@google.com> | 2016-03-10 16:56:23 +0100 |
commit | 7e3903b1f13fb387d6a9b9147faf5fda090c93db (patch) | |
tree | 547d247149cc1482e9af26ed7b7105cfcdd17553 /src/cpu/via/c7 | |
parent | 3d840d09aea6246347afea8f19dc1d71da06aba2 (diff) | |
download | coreboot-7e3903b1f13fb387d6a9b9147faf5fda090c93db.tar.xz |
cpu/via/c7: Don't manually include udelay_io.c
Use UDELAY_IO selected by CPU_VIA_C7, so no manual inclusion
(or secondary UDELAY implementation) is needed
Change-Id: Ib086a1bfe8ffca5757bf553c5a62a45da7a410b6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13782
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/via/c7')
-rw-r--r-- | src/cpu/via/c7/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig index 350771392c..b71178dae5 100644 --- a/src/cpu/via/c7/Kconfig +++ b/src/cpu/via/c7/Kconfig @@ -9,7 +9,9 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select UDELAY_TSC + # Missing tsc_freq_mhz and TSC_CONSTANT_RATE + #select UDELAY_TSC + select UDELAY_IO select MMX select SSE2 |